IS61LV5128-10 Integrated Silicon Solution Inc, IS61LV5128-10 Datasheet - Page 7

• Manufacturer Part Number: IS61LV5128-10
• Description: 512K x 8 HIGH-SPEED CMOS STATIC RAM
• Manufacturer: Integrated Silicon Solution Inc

IS61LV5128
AC WAVEFORMS
WRITE CYCLE NO. 1
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. B
07/16/01
WRITE CYCLE SWITCHING CHARACTERISTICS
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
3. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write, but
4. Tested with OE HIGH.
Symbol
t
t
t
t
t
t
t
t
t
t
t
output loading specified in Figure 1.
any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of
the signal that terminates the Write.
WC
SCE
AW
HA
SA
PWE
PWE
SD
HD
HZWE
LZWE
1
2
ADDRESS
(2)
(4)
(2)
D
OUT
WE
D
CE
Parameter
Write Cycle Time
CE to Write End
Address Setup Time to
Address Hold from
Address Setup Time
WE Pulse Width
WE Pulse Width (OE = LOW)
Data Setup to Write End
Data Hold from Write End
WE LOW to High-Z Output
WE HIGH to Low-Z Output
IN
(1,2)
DATA UNDEFINED
t
(CE Controlled, OE = HIGH or LOW)
SA
Min.
10
10
t
8
8
0
0
8
6
0
0
0
-10 ns
HZWE
t
VALID ADDRESS
AW
t
t
Write End
Write End
PWE1
PWE2
Max.
t
t
—
—
—
—
—
—
—
—
—
—
SCE
WC
5
(1,3)
HIGH-Z
(Over Operating Range)
t
SD
Min.
DATA
12
12
9
9
0
0
8
6
0
0
0
-12 ns
IN
VALID
Max.
—
—
—
—
—
—
—
—
—
—
6
t
HD
t
LZWE
t
HA
Min.
15
10
10
10
12
0
0
7
0
0
0
-15 ns
Max.
—
—
—
—
—
—
—
—
—
—
7
CE_WR1.eps
ISSI
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
®
7