AD8061-EB Analog Devices, AD8061-EB Datasheet - Page 13

• Manufacturer Part Number: AD8061-EB
• Description: Low-Cost/ 300 MHz Rail-to-Rail Amplifiers
• Manufacturer: Analog Devices

For signals approaching the minus supply and inverting gain
and high positive gain configurations, the headroom limit will be
the output stage. The AD806x amplifiers use a common emitter
style output stage. This output stage maximizes the available
output range, limited by the saturation voltage of the output
transistors. The saturation voltage increases with the drive
current the output transistor is required to supply, due to the
output transistors’ collector resistance. The saturation voltage
can be estimated using the equation V
where I
output transistors’ collector resistance.
Figure 43. Output Rising Edge for 1 V Step at Input Head-
room Limits, G = 1, V
As the saturation point of the output stage is approached, the
output signal will show increasing amounts of compression and
clipping. As in the input headroom case, the higher frequency
signals require a bit more headroom than the lower frequency
signals. Figures 13, 14, and 15 illustrate the point, plotting typi-
cal distortion versus output amplitude and bias for gains of 2
and 5.
Overload Behavior and Recovery
Input
The specified input common-mode voltage of the AD806x is
–200 mV below the negative supply to within 1.8 V of the posi-
tive supply. Exceeding the top limit results in lower bandwidth
and increased settling time as seen in the previous Figures 42
and 43. Pushing the input voltage of a unity gain follower beyond
1.6 V within the positive supply leads to the behavior shown in
Figure 44—an increasing amount of output error as well as
much increased settling time. Recovery time from input volt-
ages 1.6 V or closer to the positive supply is about 35 ns, which
is limited by the settling artifacts caused by transistors in the
input stage coming out of saturation.
The AD806x family does not exhibit phase reversal, even for
input voltages beyond the voltage supply rails. Going more than
0.6 V beyond the power supplies will turn on protection diodes
at the input stage which will greatly increase the device’s current
draw.
REV. A
O
3.6
3.4
3.2
3.0
2.8
2.6
2.4
2.2
2.0
is the output current, and 8
0
4
8
S
= 5 V, 0 V
12
2V TO 3V STEP
2.1V TO 3.1V STEP
TIME – ns
16
2.2V TO 3.2V STEP
20
2.3V TO 3.3V STEP
SAT
is a typical value for the
2.4V TO 3.4V STEP
= 25 mV + I
24
28
32
O
8 ,
–13–
Figure 44. Pulse Response for G = 1 Follower, Input Step
Overloading the Input Stage
Output
Output overload recovery is typically within 40 ns after the
amplifier’s input is brought to a nonoverloading value. Figure
45 shows output recovery transients for the amplifier recovering
from a saturated output from the top and bottom supplies to a
point at midsupply.
CAPACITIVE LOAD DRIVE
The AD806x family is optimized for bandwidth and speed, not
for driving capacitive loads. Output capacitance will create a
pole in the amplifier’s feedback path, leading to excessive
peaking and potential oscillation. If dealing with load capaci-
tance is a requirement of the application, the two strategies to
consider are (1) using a small resistor in series with the
amplifier’s output and the load capacitance and (2) reducing
the bandwidth of the amplifier’s feedback loop by increasing the
overall noise gain.
Figure 45. Overload Recovery, G = –1, V
–.20
3.7
3.5
3.3
3.1
2.9
2.7
2.5
2.3
2.1
5.0
4.6
4.2
3.8
3.4
3.0
2.6
2.2
1.8
1.4
1.0
.60
.20
0
0
VOLTAGE STEP FROM 2.4V TO 3.8V, 4 AND 5V
INPUT VOLTAGE
VOLTAGE STEP FROM 2.4V TO 3.4V
100
10
VOLTAGE STEP FROM 2.4V TO 3.6V
EDGES
AD8061/AD8062/AD8063
20
200
30
TIME – ns
TIME – ns
300
40
V
IN
400
2.5V
OUTPUT VOLTAGE
5V TO 2.5V
R
50
OUTPUT VOLTAGE
0V TO 2.5V
500
60
R
5V
S
= 5 V
600
70
V
O