MAX9152ESE Maxim, MAX9152ESE Datasheet - Page 9

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MAX9152ESE

Manufacturer Part Number
MAX9152ESE
Description
800Mbps LVDS/LVPECL-to-LVDS 2 x 2 Crosspoint Switch
Manufacturer
Maxim
Datasheet

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Figure 6. Output Transition Time and Propagation Delay Timing
Diagram
Figure 7. Output Channel-to-Channel Skew
lel as close to the device as possible, with the smaller
value capacitor closest to V
Trace characteristics affect the performance of the
MAX9152. Use controlled-impedance traces. Eliminate
reflections and ensure that noise couples as common
mode by running the differential trace pairs close
together. Reduce skew by matching the electrical
length of the traces. Excessive skew can result in a
degradation of magnetic field cancellation.
Maintain the distance between the differential traces to
avoid discontinuities in differential impedance. Avoid
90° turns and minimize the number of vias to further
prevent impedance discontinuities.
Transmission media should have nominal differential
impedance of 75Ω or 100Ω. Use cables and connec-
tors that have matched differential impedance to mini-
mize impedance discontinuities.
V
V
t
OUT_+
OUT_-
V
PLHD
V
IN_+
IN_-
V
V
t
(1:2 SPLITTER MODE)
V
V
CCS
OUT0+
OUT1+
AND t
OUT0-
OUT1-
IS MEASURED WITH SEL0 = SEL1 = HIGH OR LOW
PHLD
ARE MEASURED FOR ANY COMBINATION OF SEL0 AND SEL1.
20%
50%
t
PLHD
V
ID
_______________________________________________________________________________________
t
LHT
= 0
V
V
V
V
V
OD
OD
OD
ID
OD
V
80%
OD
= (V
= 0
= (V
= 0
V
= (V
= 0
OD
Cables and Connectors
t
800Mbps LVDS/LVPECL-to-LVDS 2 x 2
OUT_+
CCS
IN_+
OUT_+
= 0
CC
) - (V
) - (V
) - (V
.
Differential Traces
IN_-
OUT_-
OUT_-
80%
)
50%
t
PHLD
V
)
)
ID
t
HLT
= 0
V
V
V
OD
OD
OD
20%
V
OD
= 0
= 0
= 0
t
CCS
= 0
+V
-V
OD
OD
Avoid the use of unbalanced cables such as ribbon or
simple coaxial cable. Balanced cables such as twisted
pair offer superior signal quality and tend to generate
less EMI due to canceling effects. Balanced cables
tend to pick up noise as common mode, which is
rejected by the differential receiver.
For LVDS applications, a four-layer printed-circuit (PC)
board that provides separate power, ground, and sig-
nal planes is recommended.
Figure 8. Programmable Configurations
IN0 OR IN1
IN0 OR IN1
Crosspoint Switch
IN0
IN1
IN0
IN1
IN0
IN1
2 x 2 CROSSPOINT
DUAL REPEATER
1:2 SPLITTER
1:2 DEMUX
2:1 MUX
Board Layout
OUT0
OUT1
OUT0 OR OUT1
OUT0
OUT1
OUT0
OUT1
OUT0
OUT1
9

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