MM74C240 Fairchild, MM74C240 Datasheet

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MM74C240

Manufacturer Part Number
MM74C240
Description
Inverting . Non-Inverting Octal Buffer and Line Driver with 3-STATE Outputs
Manufacturer
Fairchild
Datasheet

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© 1999 Fairchild Semiconductor Corporation
MM74C240 • MM74C244
Inverting • Non-Inverting Octal Buffer and
Line Driver with 3-STATE Outputs
General Description
The MM74C240 and MM74C244 octal buffers and line
drivers are monolithic complementary MOS (CMOS) inte-
grated circuits with 3-STATE outputs. These outputs have
been specially designed to drive highly capacitive loads
such as bus-oriented systems. These devices have a fan
out of 6 low power Schottky loads. A high logic level on the
output disable control input G makes the outputs go into
the high impedance state.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Connection Diagrams
Order Number
MM74C240WM
MM74C240N
MM74C244WM
MM74C244N
Package Number
MM74C240
(Top View)
M20B
M20B
N20A
N20A
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Pin Assignments for DIP and SOIC
DS005905
Features
Wide supply voltage range (3V to 15V)
High noise immunity (0.45 V
Low power consumption
High capacitive load drive capability
3-STATE outputs
Input protection
TTL compatibility
20-pin dual-in-line package
High speed 25 ns (typ.) @ 10V, 50 pF (MM74C244)
Package Description
MM74C244
(Top View)
CC
October 1987
Revised July 1999
typ)
www.fairchildsemi.com

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MM74C240 Summary of contents

Page 1

... Inverting • Non-Inverting Octal Buffer and Line Driver with 3-STATE Outputs General Description The MM74C240 and MM74C244 octal buffers and line drivers are monolithic complementary MOS (CMOS) inte- grated circuits with 3-STATE outputs. These outputs have been specially designed to drive highly capacitive loads such as bus-oriented systems ...

Page 2

... Logic Diagrams MM74C240 Truth Tables MM74C240 ODA ODB HIGH 0 LOW X Don’t Care Z 3-STATE www.fairchildsemi.com OA ODA ODB MM74C244 MM74C244 ...

Page 3

... OUT 5V OUT 10V OUT 18V 260 C Typ Max Units V V 1 0 0.005 1.0 A 0.005 A 0.05 300 www.fairchildsemi.com ...

Page 4

... Transition Time T(HL) T(LH) C Power Dissipation PD Capacitance (Output Enabled per Buffer) MM74C240 MM74C244 (Output Disabled per Buffer) MM74C240 MM74C244 C Input Capacitance (Note 4) IN (Any Input) C Output Capacitance (Note 4) O (Output Disabled) Note 2: AC Parameters are guaranteed by DC correlated testing. Note 3: C determines the no load AC power consumption of any CMOS device. For complete explanation see Family Characteristics Application Note, PD AN-90 ...

Page 5

... Typical Application Typical Performance Characteristics N-Channel Output Drive MM74C240 Propagation Delay vs. Load Capacitance P-Channel Output Drive MM74C244 Propagation Delay vs. Load Capacitance 5 www.fairchildsemi.com ...

Page 6

... AC Test Circuits and Switching Time Waveforms t t pd0, pd1 Note: Delays measured with input ns CMOS to CMOS Note defined as the DC output low voltage when the device is loaded with www.fairchildsemi.com t and and and Note: V ...

Page 7

... Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body Package Number M20B 7 www.fairchildsemi.com ...

Page 8

... Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. ...

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