MK1714-02RITR Integrated Circuit Systems, MK1714-02RITR Datasheet - Page 4

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MK1714-02RITR

Manufacturer Part Number
MK1714-02RITR
Description
Spread Spectrum Multiplier Clock
Manufacturer
Integrated Circuit Systems
Datasheet
MDS 1714-02 C
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126• (408) 295-9800tel • www.icst.com
External Components
The MK1714 requires a minimum number of external components for proper operation. Decoupling
capacitors of 0.01µF should be connected between VDD and GND (on pins 4 and 7), as close to the chip
as possible. A series termination resistor of 33
connected as close to the chip as possible. The crystal should be a fundamental mode and parallel resonant.
If accurate tuning is required, crystal capacitors should be connected from pins X1 to ground and X2 to
ground. The value of these capacitors is given by the following equation, where C
capacitance: Crystal caps (pF) = (C
should be used. If a clock input is used, drive it into X1 and leave X2 unconnected.
Notes:
Electrical Specifications
Parameter
ABSOLUTE MAXIMUM RATINGS (note 1)
ABSOLUTE MAXIMUM RATINGS (note 1)
Supply voltage, VDD
Inputs and Clock Outputs
Ambient Operating Temperature
Soldering Temperature
Storage temperature
DC CHARACTERISTICS (VDD = 3.3V or 5V unless noted)
DC CHARACTERISTICS (VDD = 3.3V or 5V unless noted)
DC CHARACTERISTICS (VDD = 3.3V or 5V unless noted)
Operating Voltage, VDD
Input High Voltage, VIH, X1/ICLK only
Input Low Voltage, VIL, X1/ICLK only
Input High Voltage, VIH
Input Low Voltage, VIL
Output High Voltage, VOH
Output Low Voltage, VOL
Output High Voltage, VOH, VDD = 3.3 or 5V
Operating Supply Current, IDD, at 5V
Operating Supply Current, IDD, at 3.3V
Short Circuit Current, VDD = 3.3
Input Capacitance
Internal Pull-up or Pull-down Resistor
AC CHARACTERISTICS (VDD = 3.3V or 5V unless noted)
AC CHARACTERISTICS (VDD = 3.3V or 5V unless noted)
Input Crystal Frequency
Input Clock Frequency
Output Clock Rise Time
Output Clock Fall Time
Output Clock Duty Cycle
One Sigma Jitter, CLK
Absolute Jitter, CLK
1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged
2. Multiplier of x1, all clocks at highest frequencies.
exposure to levels above the operating limits but below the Absolute Maximums may affect device reliability.
L
-6) x 2. So for a crystal with 20pF load capacitance, two 28 pF caps
Conditions
Referenced to GND
Referenced to GND
MK1714-02RI only
Max of 10 seconds
Clock input
Clock input
Select inputs, OE, PD
Select inputs, OE, PD
VDD=3.3V, IOH=-8mA
VDD=3.3V, IOL=8mA
IOH=-8mA
No Load, note 2
No Load, note 2
Each output
Except X1, X2
Except X1
See page 3
0.8 to 2.0V, no load
2.0 to 0.8V, no load
At VDD/2
may be used for each clock output. The crystal must be
4
Spread Spectrum Multiplier Clock
VDD/2 + 1
Minimum
VDD-0.4
-0.5
-40
-65
3.0
2.4
10
10
40
0
2
Typical
VDD/2
VDD/2
±160
±50
500
40
26
50
40
7
L
is the crystal load
VDD/2 - 1
Maximum
VDD+0.5
MK1714-02
260
150
150
5.5
0.8
0.4
1.5
1.5
70
85
25
60
7
Revision 120400
Units
MHz
MHz
mA
mA
mA
k
°C
°C
°C
°C
pF
%
V
V
V
V
V
V
V
V
V
V
ns
ns
ps
ps

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