LTC6252 Linear Technology, LTC6252 Datasheet - Page 15

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LTC6252

Manufacturer Part Number
LTC6252
Description
3.5mA Power Efficient Rail-to-Rail I/O Op Amps
Manufacturer
Linear Technology
Datasheet

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DataSheet.in
APPLICATIONS INFORMATION
Shutdown
The LTC6252 and LTC6253MS have SHDN pins that can
shut down the amplifi er to 42μA typical supply current. The
SHDN pin needs to be taken within 0.8V of the negative
supply for the amplifi er to shut down. When left fl oating,
the SHDN pin is internally pulled up to the positive supply
and the amplifi er remains on.
Feedback Components
When feedback resistors are used to set up gain, care
must be taken to ensure that the pole formed by the
feedback resistors and the parasitic capacitance at the
inverting input does not degrade stability. For example
if the amplifi er is set up in a gain of +2 confi guration
with gain and feedback resistors of 5k, a parasitic ca-
pacitance of 5pF (device + PC board) at the amplifi er’s
inverting input will cause the part to oscillate, due to
a pole formed at 12.7MHz. An additional capacitor of
5pF across the feedback resistor as shown in Figure 2
will eliminate any ringing or oscillation. In general, if
the resistive feedback network results in a pole whose
frequency lies within the closed loop bandwidth of the
amplifi er, a capacitor can be added in parallel with the
feedback resistor to introduce a zero whose frequency is
close to the frequency of the pole, improving stability.
Figure 2. 5pF Feedback Cancels Parasitic Pole
5k
C
V
PAR
IN
5pF
+
5k
624678 F02
V
OUT
Power Dissipation
The LTC6252 and LTC6253 contain one and two amplifi ers
respectively. Hence the maximum on-chip power dis-
sipation for them will be less than the maximum on-chip
power dissipation for the LTC6254, which contains four
amplifi ers.
The LTC6254 is housed in a small 16-lead MS package and
typically has a thermal resistance (θ
necessary to ensure that the die’s junction temperature
does not exceed 150°C. The junction temperature, T
calculated from the ambient temperature, T
sipation, PD, and thermal resistance, θ
The power dissipation in the IC is a function of the supply
voltage, output voltage and load resistance. For a given
supply voltage with output connected to ground or supply,
the worst-case power dissipation P
the supply current is maximum and the output voltage at
half of either supply voltage for a given load resistance.
P
output load current) given by:
Example: For an LTC6254 in a 16-lead MS package operating
on ±2.5V supplies and driving a 100Ω load to ground, the
worst-case power dissipation is approximately given by
If all four amplifi ers are loaded simultaneously then the
total power dissipation is 158mW.
At the Absolute Maximum ambient operating temperature,
the junction temperature under these conditions will be:
which is less than the absolute maximum junction tem-
perature for the LTC6254 (150°C).
Refer to the Pin Confi guration section for thermal resis-
tances of various packages.
LTC6252/LTC6253/LTC6254
D(MAX)
T
P
T
P
J
J
D(MAX)
D(MAX)
= T
= T
= 125 + (0.158W • 125°C/W) = 145°C
A
is approximately (since I
A
+ (P
/Amp = (5 • 4.8mA) + (1.25)
+ P
= (V
D
D
S
• 125°C/W
• θ
•I
S(MAX)
JA
)
) +
⎝ ⎜
V
2
S
S
⎠ ⎟
actually changes with
2
JA
D(MAX)
/ R
) of 125°C/ W. It is
JA
2
L
/100 = 39.6mW
:
A
occurs when
, power dis-
15
625234f
J
, is

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