74LV595 Philips, 74LV595 Datasheet - Page 2

• Manufacturer Part Number: 74LV595
• Description: 8-bit serial-in/serial or parallel-out shift register with output latches 3-State
• Manufacturer: Philips

1. C
2. The condition is V
Philips Semiconductors
FEATURES
QUICK REFERENCE DATA
GND = 0V; T
NOTES:
ORDERING AND PACKAGE INFORMATION
t
f
C
C
16-Pin Plastic DIL
16-Pin Plastic SO
16-Pin Plastic SSOP Type II
16-Pin Plastic TSSOP Type I
1998 Apr 20
PHL
max
Optimized for Low Voltage applications: 1.0V to 3.6V
Accepts TTL input levels between V
Typical V
T
Typical V
T
8-bit serial input
8-bit serial or parallel output
Storage register with 3-State outputs
Shift register with direct clear
Output capability:
– parallel outputs; bus driver
– serial output; standard
I
8-bit serial-in/serial or parallel-out shift register
with output latches (3-State)
I
PD
CC
P
f
f
amb
amb
i
o
PD
D
= input frequency in MHz; C
/t
= output frequency in MHz; V
(C
category: MSI
PLH
= C
SYMBOL
= 25 C
= 25 C
L
is used to determine the dynamic power dissipation (P
PD
OLP
OHV
amb
V
PACKAGES
CC
(output ground bounce) < 0.8V at V
(output V
V
2
= 25 C; t
CC
2
f
I
o
x f
= GND to V
) = sum of the outputs.
i
OH
Propagation delay
SH
ST
MR to Q
Maximum clock frequency SH
Input capacitance
Power dissipation capacitance per gate
r
) (C
=t
CP
undershoot) > 2V at V
CP
f
v2.5 ns
to Q
to Q
L
L
7’
CC.
= output load capacitance in pF;
CC
7’
7’
V
CC
= supply voltage in V;
CC
TEMPERATURE RANGE
PARAMETER
= 2.7V and V
2
–40 C to +125 C
–40 C to +125 C
–40 C to +125 C
–40 C to +125 C
f
o
) where:
CC
CC
= 3.3V,
= 3.3V,
CC
CP
= 3.6V
, ST
CP
D
in W)
OUTSIDE NORTH AMERICA
C
V
V
Notes 1 and 2
2
CC
CC
L
= 15pF
= 3.3V
APPLICATIONS
DESCRIPTION
The 74LV595 is a low-voltage Si-gate CMOS device that is pin and
function compatible with 74HC/HCT595.
The74LV595 is an 8-stage serial shift register with a storage register
and 3-State outputs. The shift register and storage register have
separate clocks.
Data is shifted on the positive-going transitions of the SH
The data in each register is transferred to the storage register on a
positive-going transition of the ST
connected together, the shift register will always be one clock pulse
ahead of the storage register.
The shift register has a serial input (D
(Q
(active LOW) for all 8 shift register stages. The storage register has
8 parallel 3-State bus driver outputs. Data in the storage register
appears at the output whenever the output enable input (OE) is
LOW.
= 3.3V
74LV595 PW
74LV595 DB
74LV595 N
74LV595 D
Serial-to-parallel data conversion
Remote control holding register
7’
CONDITIONS
) all for cascading. It is also provided with asynchronous reset
NORTH AMERICA
74LV595PW DH
74LV595 DB
74LV595 N
74LV595 D
CP
TYPICAL
input. If both clocks are
S
115
3.5
15
16
14
77
) and a serial standard output
Product specification
74LV595
PKG. DWG. #
853-1987 19255
SOT109-1
SOT338-1
SOT403-1
SOT38-4
CP
UNIT
MHz
ns
pF
pF
input.