74LVC16245A Philips, 74LVC16245A Datasheet - Page 2

• Manufacturer Part Number: 74LVC16245A
• Description: 16-bit bus transceiver with direction pin; 5V tolerant 3-State
• Manufacturer: Philips

1. C
Philips Semiconductors
FEATURES
DESCRIPTION
The 74LVC(H)16245A is a high-performance, low-power,
low-voltage, Si-gate CMOS device, superior to most advanced
CMOS compatible TTL families. Inputs can be driven from either
3.3V or 5V devices. In 3-State operation, outputs can handle 5V.
These features allow the use of these devices in a mixed 3.3V/5V
environment.
The 74LVC(H)16245A is a 16-bit transceiver featuring non-inverting
3-State bus compatible outputs in both send and receive directions.
The 74LVC(H)16245A features two output enable (nOE) inputs for
easy cascading and two send/receive (nDIR) inputs for direction
control. nOE controls the outputs so that the buses are effectively
isolated. This device can be used as two 8-bit transceivers or one
16-bit transceiver.
The 74LVCH16245A bus hold data inputs eliminates the need for
extreme pull up resistors to hold unused inputs.
ORDERING INFORMATION
QUICK REFERENCE DATA
GND = 0V; T
NOTES:
48-Pin Plastic SSOP Type III
48-Pin Plastic TSSOP Type II
48-Pin Plastic SSOP Type III
48-Pin Plastic TSSOP Type II
1997 Sep 25
5 volt tolerant inputs/outputs for interfacing with 5V logic
Wide supply voltage range of 1.2V to 3.6V
Complies with JEDEC standard no. 8-1A
CMOS low power consumption
MULTIBYTE
Low inductance multiple power and ground pins for minimum
noise and ground bounce
Direct interface with TTL levels
High impedance when V
All data inputs have bus hold (74LVCH16245A only)
16-bit bus transceiver with direction pin; 5V tolerant
(3-State)
t
C
C
C
PHL
P
f
f
S (C
SYMBOL
i
o
I
I/O
PD
PD
D
= input frequency in MHz; C
= output frequency in MHz; V
= C
/t
L
PLH
is used to determine the dynamic power dissipation (P
PD
V
PACKAGES
amb
CC
TM
V
2
= 25 C; t
CC
flow-through standard pin-out architecture
Propagation delay
An to Bn;
Bn to An
Input capacitance
Input/output capacitance
Power dissipation capacitance per buffer
f
2
o
) = sum of the outputs.
f
i
+ S (C
r
CC
= t
f
= 0
L
2.5ns
L
PARAMETER
V
= output load capacity in pF;
CC
CC
= supply voltage in V;
2
TEMPERATURE RANGE
f
o
) where:
–40 C to +85 C
–40 C to +85 C
–40 C to +85 C
–40 C to +85 C
D
in W):
C
V
V
CC
I
L
OUTSIDE NORTH AMERICA
= GND to V
= 50pF
= 3.3V
2
74LVCH16245A DGG
74LVC16245A DGG
74LVCH16245A DL
74LVC16245A DL
PIN CONFIGURATION
CC
1
CONDITIONS
V
V
1DIR
GND
GND
GND
GND
2DIR
1B0
1B1
1B2
1B3
1B4
1B5
1B6
1B7
2B0
2B1
2B2
2B3
CC1
2B4
2B5
2B6
2B7
CC1
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
1
2
3
4
5
6
7
8
9
NORTH AMERICA
VCH16245A DGG
VC16245A DGG
VCH16245A DL
VC16245A DL
SW00198
74LVCH16245A
74LVC16245A/
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
TYPICAL
1OE
1A0
1A1
GND
1A2
1A3
V
1A4
1A5
GND
1A6
1A7
2A0
2A1
GND
2A2
2A3
V
2A4
2A5
GND
2A6
2A7
2OE
Product specification
CC2
CC2
3.0
5.0
10
30
DWG NUMBER
853-2013 18424
SOT370-1
SOT362-1
SOT370-1
SOT362-1
UNIT
pF
pF
pF
ns