DS2431X Dallas Semiconducotr, DS2431X Datasheet - Page 7

• Manufacturer Part Number: DS2431X
• Description: 1024-Bit 1-Wire EEPROM
• Manufacturer: Dallas Semiconducotr

The protection control registers determine how incoming data on a write-scratchpad command is loaded into the
scratchpad. A protection setting of 55h (Write Protect) causes the incoming data to be ingnored and the target
address main memory data to be loaded into the scratchpad. A protection setting of AAh (EPROM Mode) causes
the logical AND of incoming data and target address main memory data to be loaded into the scratchpad. Any
other protection control register setting leaves the associated memory page open for unrestricted write access.
Protection control byte settings of 55h or AAh also write protect the protection control byte. The protection-control
byte setting of 55h does not block the copy. This allows write-protected data to be refreshed (i. e., reprogrammed
with the current data) in the device.
The copy protection byte is used for a higher level of security, and should only be used after all other protection
control bytes, user bytes, and write-protected pages are set to their final value. If the copy protection byte is set to
55h or Aah, all copy attempts to the register row and user byte row are blocked. In addition, all copy attempts to
write-protected main memory pages (i. e., refresh) are blocked.
ADDRESS REGISTERS AND TRANSFER STATUS
The DS2431 employs three address registers: TA1, TA2, and E/S (Figure 6). These registers are common to many
other 1-Wire devices but operate slightly differently with the DS2431. Registers TA1 and TA2 must be loaded with
the target address to which the data is written or from which data is read. Register E/S is a read-only transfer-
status register, used to verify data integrity with write commands. ES bits E2:E0 are loaded with the incoming
T2:T0 on a write-scratchpad command, and increment on each subsequent data byte. This is in effect a byte-
ending offset counter within the 8-byte scratchpad. Bit 5 of the E/S register, called PF, is a logic 1 if the data in the
scratchpad is not valid due to a loss of power or if the master sends less bytes than needed to reach the end of the
scratchpad. For a valid write to the scratchpad, T2:T0 must be 0 and the master must have sent 8 data bytes. Bits
3, 4, and 6 have no function; they always read 0. The highest valued bit of the E/S register, called AA or
Authorization Accepted, acts as a flag to indicate that the data stored in the scratchpad has already been copied to
the target memory address. Writing data to the scratchpad clears this flag.
Figure 6. Address Registers
Target Address (TA1)
Target Address (TA2)
Ending Address with
Data Status (E/S)
(Read Only)
Bit #
T15
AA
T7
7
T14
T6
6
0
T13
PF
T5
5
7 of 23
T12
T4
4
0
T11
T3
3
0
T2
E2
T10
2
DS2431: 1024-Bit, 1-Wire EEPROM
T1
E1
T9
1
T0
E0
T8
0