LM9822CCWM1 National Semiconductor, LM9822CCWM1 Datasheet - Page 14
![no-image](/images/manufacturer_photos/0/4/469/national_semiconductor_sml.jpg)
LM9822CCWM1
Manufacturer Part Number
LM9822CCWM1
Description
LM9822 3 Channel 42-Bit Color Scanner Analog Front End
Manufacturer
National Semiconductor
Datasheet
1.LM9822CCWM1.pdf
(22 pages)
Power-Up Default Register Settings are shown in Bold Italics
Table 2: Configuration Register Parameters
(Data Output Edge)
Signal Polarity
(Power Down)
CDS (Enable)
Parameter
(Address)
I/O Mode
CDSREF
SMPCL
DOE
PD
(0)
(0)
(0)
(0)
(0)
(0)
(0)
B7
B6
B5
B4
B3
B2
B0
0
1
0
1
0
1
0
1
0
1
0
0
1
1
0
1
D7-D0 are clocked out (change) on the falling edge of MCLK - Recommended setting for
B1
0
1
0
1
Reference (for pixel N+1) sampled 1 MCLK cycle after signal (for pixel N) sampled
Reference (for pixel N+1) sampled 2 MCLK cycle after signal (for pixel N) sampled
Reference (for pixel N+1) sampled 3 MCLK cycle after signal (for pixel N) sampled
Reference (for pixel N+1) sampled 4 MCLK cycle after signal (for pixel N) sampled
Clamp is on between the reference and the signal sample points
Control Bits
D7-D0 are clocked out (change) on the rising edge of MCLK
Sample Mode (0)
Clamp is on for 1 MCLK before reference sampled
Reduced Slew Rate Output Driver Operation
lowest noise and best overall performance.
Negative Polarity (CCD) Clamping to V
Positive Polarity (CIS) Clamping to V
Normal Output Driver Operation
14
CDS Enabled (CCD)
Low Power Standby
CDS disabled (CIS)
Operating
REF-
REF+
Result
www.national.com