TC7107 TelCom, TC7107 Datasheet - Page 6

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TC7107

Manufacturer Part Number
TC7107
Description
3-1/2 DIGIT A/D CONVERTERS
Manufacturer
TelCom
Datasheet

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GENERAL THEORY OF OPERATION
DUAL SLOPE CONVERSION PRINCIPLES
analog-to-digital converters. An understanding of the dual
slope conversion technique will aid in following the detailed
operation theory.
cycle has two distinct phases:
time period (T
pulses. An opposite polarity constant reference voltage is
then integrated until the integrator output voltage returns to
zero. The reference integration time is directly proportional
to the input signal (T
requires the integrator output to “ramp-up” and “ramp-
down.”
reference voltage and integration time:
PIN DESCRIPTION (Cont.)
3-188
TC7106
TC7106A
TC7107
TC7107A
40-Pin PDIP 40-Pin PDIP
(All Pin Designations Refer to the 40-Pin DIP)
The TC7106A and TC7107A are dual slope, integrating
The conventional dual slope converter measurement
Input Signal Integration
Reference Voltage Integration (Deintegration)
The input signal being converted is integrated for a fixed
In a simple dual slope converter a complete conversion
A simple mathematical equation relates the input signal,
(Normal)
Pin No.
34
35
36
37
38
39
40
SI
RC
1
). Time is measured by counting clock
(Reverse)
Pin No.
RI
). (Figure 2A).
T
(7)
(6)
(5)
(4)
(3)
(2)
(1)
0
SI
V
IN
(t)dt =
Symbol
V
OSC
OSC
OSC
RC
C
V
V
R
Test
T
REF
+
REF
+
REF
RI
3
2
1
Description
A 0.1 F capacitor is used in most applications. If a large common-
mode voltage exists (for example, the V
common), and a 200mV scale is used, a 1 F capacitor is recom-
mended and will hold the roll-over error to 0.5 count.
See pin 36.
The analog input required to generate a full-scale output (1999
counts). Place 100mV between pins 35 and 36 for 199.9mV
full-scale. Place 1V between pins 35 and 36 for 2V full scale. See
paragraph on REFERENCE VOLTAGE.
Lamp test. When pulled HIGH (to V
and the display should read –1888. It may also be used as a negative
supply for externally-generated decimal points. See paragraph under
TEST for additional information.
See pin 40.
See pin 40.
Pins 40, 39, 38 make up the oscillator section. For a 48kHz clock
(3 readings per section), connect pin 40 to the junction of a 100k
resistor and a 100pF capacitor. The 100k resistor is tied to pin 39
and the 100pF capacitor is tied to pin 38.
where:
V
T
T
For a constant V
V
SI
RI
R
IN
= Reference Voltage
= Signal Integration Time (Fixed)
= Reference Voltage Integration Time (Variable)
= V
ANALOG
VOLTAGE
SIGNAL
INTEGRATE
INPUT
REF
R
SIGNAL
Figure 2A. Basic Dual Slope Converter
3-1/2 DIGIT A/D CONVERTERS
+/–
FIXED
TIME
T
T
RI
SI
POLARITY CONTROL
VARIABLE
REFERENCE
INTEGRATE
TIME
IN
TELCOM SEMICONDUCTOR, INC.
DISPLAY
:
INTEGRATOR
SWITCH
DRIVER
+
+
V IN
V IN
) all segments will be turned on
C
PHASE
CONTROL
IN
V FULL SCALE
1/2 V FULL SCALE
pin is not at analog
+
COMPARATOR
CONTROL
LOGIC
COUNTER
CLOCK

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