LM1246AAA National Semiconductor, LM1246AAA Datasheet - Page 38

• Manufacturer Part Number: LM1246AAA
• Description: 150 MHz I2C Compatible RGB Preamplifier with Internal 512 Character OSD ROM/ 512 Character RAM and 4 DACs
• Manufacturer: National Semiconductor

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Bits 31–0
Control Register Definitions
ROM Bank Select Register A:
ROM Bank Select Register B:
The actual address for any character in ROM is formed, in logic, from the address in the Page RAM, by this sequence (also see
Figure 13):
1. The upper 2 bits of the character address in Page RAM are used to address one of the four 3-bit fields in Bank Select Register
Bits 2–0
Bit 3
Bits 6–4
Bit 7
Bits 2–0
Bit 3
Bits 6–4
Bit 7
A or Bank Select Register B. As shown in Table 28. Address Lookup, depending on which of the four values is present, the
corresponding 3-bit bank address is obtained from the BANKSEL_0, BANKSEL_1, BANKSEL_2, or BANKSEL_3 field shown
in the last column.
These are the Display Window 2 Column Width 2x Enable Bits. These thirty-two bits correspond to columns 31–0
of Display Window 2, respectively. A value of zero indicates the column will have normal width (12 OSD pixels). A
value of one indicates the column will be twice as wide as normal (24 OSD pixels). For the double wide case, each
Character Font pixel location will be displayed twice, in two consecutive horizontal pixel locations. The user should
note that if more than 32 display characters are programmed to reside on a line, then all display characters after
the first thirty-two will have normal width (12 pixels).
Character Address in Page
This three-bit field determines the ROM bank (0–7) selected when bits 7–6 of the character
address in Page RAM are 00 (Character Address = 00xxxxxxb)
This bit is reserved and should be set to 0.
This three-bit field determines the ROM bank (0–7) selected when bits 7–6 of the character
address in Page RAM are 01 (Character Address = 01xxxxxxb)
This bit is reserved and should be set to 0.
This three-bit field determines the ROM bank (0–7) selected when bits 7–6 of the Page RAM
address are 10 (Character Address = 10xxxxxxb)
This bit is reserved and should be set to 0.
This three-bit field determines the ROM bank (0–7) selected when bits 7–6 of the Page RAM
address are 11 (Character Address = 11xxxxxxb)
This bit is reserved and should be set to 0.
Res’d
Res’d
00xxxxxxb
01xxxxxxb
10xxxxxxb
11xxxxxxb
X
X
RAM
Bank Select 1
Bank Select 3
B1AD[2:0]
B3AD[2:0]
TABLE 28. Address Lookup
(Continued)
BANKSEL_0-1 (0x8427)
BANKSEL_2-3 (0x8428)
Upper Two Bits
00b
01b
10b
11b
38
Res’d
Res’d
X
X
Three-Bit Bank Address
Bank Select 0
Bank Select 2
B1AD[2:0]
B2AD[2:0]
B0AD[2:0]
B1AD[2:0]
B2AD[2:0]
B3AD[2:0]
Source