AD5251 Analog Devices, AD5251 Datasheet - Page 22

• Manufacturer Part Number: AD5251
• Description: (AD5251 / AD5252) Dual 64-and 256-Position I2C Nonvolatile Memory Digital Potentiometers
• Manufacturer: Analog Devices

AD5251/AD5252
LAYOUT AND POWER SUPPLY BIASING
It is always a good practice to employ a compact, minimum
lead-length layout design. The leads to the input should be as
direct as possible, with a minimum conductor length. Ground
paths should have low resistance and low inductance.
Similarly, it is also good practice to bypass the power supplies
with quality capacitors. Low equivalent series resistance (ESR)
1 µF to 10 µF tantalum or electrolytic capacitors should be
applied at the supplies to minimize any transient disturbance
and filter low frequency ripple. Figure 39 illustrates the basic
supply bypassing configuration for the AD5251/AD5252.
The ground pin of the AD5251/AD5252 is used primarily as a
digital ground reference. To minimize the digital ground
bounce, the AD5251/AD5252 ground terminal should be joined
remotely to the common ground (see Figure 39).
DIGITAL POTENTIOMETER OPERATION
The structure of the RDAC is designed to emulate the
performance of a mechanical potentiometer. The RDAC
contains a string of resistor segments, with an array of analog
switches acting as the wiper connection to the resistor array.
The number of points is the resolution of the device. For
example, the AD5251/AD5252 emulates 64 or 256 connection
points with 64 or 256 equal resistance, R
better than 1.5%/0.4% settability resolution.
Figure 40 provides an equivalent diagram of the connections
between the three terminals that make up one channel of the
RDAC. Switches SW
switches SW(0) to SW(2
the setting decoded from the data bit. Because the switches are
nonideal, there is a 75 Ω wiper resistance, R
is a function of supply voltage and temperature; lower supply
voltages and higher temperatures result in higher wiper
resistances. Consideration of wiper resistance dynamics is
important in applications where accurate prediction of output
resistance is required.
V
V
DD
SS
C3
C4
Figure 39. Power Supply Bypassing
+
10µF
+ C2
10µF
A
and SW
C1
N–1
0.1µF
0.1µF
) is ON one at a time, depending on
B
are always ON, while one of
AD5251/AD5252
V
V
DD
SS
S
, allowing it to provide
GND
W
. Wiper resistance
Rev. 0 | Page 22 of 28
PROGRAMMABLE RHEOSTAT OPERATION
If either the W-to-B or W-to-A terminal is used as a variable
resistor, the unused terminal can be opened or shorted with W;
such operation is called rheostat mode (see Figure 41). The
resistance tolerance can range ± 20%.
The nominal resistance of the AD5251/AD5252 has 64 or 256
contact points accessed by the wiper terminal, plus the
B terminal contact. The 6-or 8-bit data-word in the RDAC
register is decoded to select one of the 64 or 256 settings. The
wiper’s first connection starts at the B terminal for Data 0x00.
This B-terminal connection has a wiper contact resistance, R
of 75 Ω, regardless of the nominal resistance. The second
connection (the AD5251 10 kΩ part) is the first tap point where
R
0x01, and so on. Each LSB data value increase moves the wiper
up the resistor ladder until the last tap point is reached at
R
equivalent RDAC circuit.
The general equation that determines the digitally programmed
output resistance between W and B, is
Where D is the decimal equivalent data contained in the RDAC
latch and R
WB
WB
= 231 Ω (R
= 9893 Ω. See Figure 40 for a simplified diagram of the
AD5251: R
AD5252: R
AB
is the nominal end-to-end resistance.
Figure 41. Rheostat Mode Configuration
DIGITAL
CIRCUITRY
OMITTED FOR
CLARITY
WB
R
WB
WB
A
B
REGISTER
DECODER
S
Figure 40. Equivalent RDAC Structure
= R
(D) = (D/64) × R
(D) = (D/256) × R
WIPER
= R
RDAC
AND
AB
W
AB
/2
N
/64 + R
B
A
R
R
R
S
S
S
W
W
SW(2
= 156 Ω + 75 Ω) for Data
SW(2
SW(1)
SW(0)
SW
SW
AB
AB
N
N
+ 75 Ω
A
B
–2)
–1)
+ 75 Ω
B
A
W
A
B
X
X
X
W
(1)
(2)
W
,