CY8C25122 Cypress Semiconductor, CY8C25122 Datasheet - Page 40
CY8C25122
Manufacturer Part Number
CY8C25122
Description
8-Bit Programmable System-on-Chip (PSoC) Microcontrollers
Manufacturer
Cypress Semiconductor
Datasheet
1.CY8C25122.pdf
(148 pages)
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Table 40:
Oscillator Control 0 Register (OSC_CR0, Address = Bank 1, E0h)
Table 41:
Oscillator Control 1 Register (OSC_CR1, Address = Bank 1, E1h)
40
Bit 7 : 32k Select
0 = Internal low precision 32 kHz oscillator
1 = External Crystal Oscillator
Bit 6 : PLL Mode
0 = Disabled
1 = Enabled, Internal Main Oscillator is locked to External Crystal Oscillator
Bit 5 : Reserved
Bit [4:3] : Sleep [1:0]
0 0 = 512 Hz or 1.95 ms period
0 1 = 64 Hz or 15.6 ms period
1 0 = 8 Hz or 125 ms period
1 1 = 1 Hz or 1 s period
Bit [2:0] : CPU [2:0]
0 0 0 = 3 MHz
0 0 1 = 6 MHz
0 1 0 = 12 MHz
0 1 1 = 24 MHz
1 0 0 = 1.5 MHz
1 0 1 = 750 kHz
1 1 0 = 187.5 kHz
1 1 1 = 93.7 kHz
Bit [7:4] : 24V1 [3:0] 4-bit data value determines the divider value for the 24V1 system-clocking signal. Note that the
4-bit data value equals n-1, where n is the desired divider value, as illustrated in
See
Bit [3:0] : 24V2 [3:0] 4-bit data value determines the divider value for the 24V2 system-clocking signal. Note that the
4-bit data value equals n-1, where n is the desired divider value, as illustrated in the
nals. See
Bit Name
Bit Name
Read/
Read/
Write
Write
Bit #
POR
Bit #
POR
Table 42 on page
Table 42 on page
Oscillator Control 0 Register
Oscillator Control 1 Register
32k Select
24V1 [3]
RW
RW
7
0
7
0
41.
PLL Mode
24V1 [2]
41.
RW
RW
6
0
6
0
Cypress MicroSystems CY8C25122/CY8C26233/CY8C26443/CY8C26643 Family Data Sheet
Document #: 38-12010 CY Rev. ** CMS Rev. 3.20
Reserved
24V1 [1]
RW
RW
5
0
5
0
Sleep [1]
24V1 [0]
RW
RW
4
0
4
0
Sleep [0]
24V2 [3]
RW
RW
3
0
3
0
24V2 [2]
CPU [2]
PSoC MCU Clock Tree of
RW
RW
2
0
2
0
PSoC MCU Clock Tree of Sig-
24V2 [1]
CPU [1]
RW
RW
1
0
1
0
September 5, 2002
24V2 [0]
CPU [0]
Signals.
RW
RW
0
0
0
0
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