LTC6241 LINER [Linear Technology], LTC6241 Datasheet - Page 22
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LTC6241
Manufacturer Part Number
LTC6241
Description
Dual/Quad 18MHz, Low Noise, Rail-to-Rail, CMOS Op Amps
Manufacturer
LINER [Linear Technology]
Datasheet
1.LTC6241.pdf
(24 pages)
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PACKAGE DESCRIPTIO
LTC6241/LTC6242
3.5 ±0.05
22
2.15 ±0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
1.65 ±0.05
(2 SIDES)
0.25 ± 0.05
2.38 ±0.05
(2 SIDES)
0.50
BSC
U
0.675 ±0.05
PACKAGE
OUTLINE
8-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1698)
TOP MARK
(NOTE 6)
PIN 1
0.200 REF
DD Package
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
ON TOP AND BOTTOM OF PACKAGE
3.00 ±0.10
0.75 ±0.05
(4 SIDES)
0.00 – 0.05
1.65 ± 0.10
(2 SIDES)
BOTTOM VIEW—EXPOSED PAD
0.25 ± 0.05
R = 0.115
TYP
4
5
2.38 ±0.10
(2 SIDES)
8
1
0.50 BSC
0.38 ± 0.10
(DD8) DFN 1203
62412f