LTC6420CUDC-20-PBF LINER [Linear Technology], LTC6420CUDC-20-PBF Datasheet - Page 9
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LTC6420CUDC-20-PBF
Manufacturer Part Number
LTC6420CUDC-20-PBF
Description
Dual Matched 1.8GHz Differential Amplifi ers/ADC Drivers
Manufacturer
LINER [Linear Technology]
Datasheet
1.LTC6420CUDC-20-PBF.pdf
(12 pages)
APPLICATIONS INFORMATION
matching network while the other input is connected to the
same matching network and a source resistor. Because the
return ratios of the two feedback paths are equal, the two
outputs have the same gain and thus symmetrical swing. In
general, the single-ended input impedance and termination
resistor R
and R
single-ended input impedance is 202Ω and R
in order to match to a 50Ω source impedance.
The LTC6420-20 is unconditionally stable. However,
the overall differential gain is affected by both source
impedance and load impedance as follows:
Output Impedance Match
The LTC6420-20 can drive an ADC directly without external
output impedance matching. Alternatively, the differential
output impedance of 25Ω can be matched to a higher
value impedance, e.g. 50Ω, by series resistors or an LC
network.
Output Common Mode Adjustment
The output common mode voltage is set by the V
which is a high impedance input. The output common
mode voltage is capable of tracking V
1.1V to 1.6V. The bandwidth of V
15MHz, which is dominated by a low pass fi lter connected
to the V
noise generation at the outputs. The internal common
mode feedback loop has a –3dB bandwidth of 300MHz,
allowing fast rejection of any common mode output voltage
disturbance. The V
voltage with a 0.1μF bypass capacitor. When interfacing
with A/D converters such as the LTC22xx families, the
V
OCM
A
V
F
pin can be connected to the V
=
. For example, when R
OCM
V
T
V
OUT
IN
are determined by the combination of R
pin and is aimed to reduce common mode
=
R
S
OCM
2000
+ 200
pin should be tied to a DC bias
•
S
25 + R
is 50Ω, it is found that the
R
L
OCM
L
CM
OCM
control is typically
pin of the ADC.
in a range from
T
is 66.5Ω
OCM
S
, R
pin,
G
Driving A/D Converters
The LTC6420-20 has been specifi cally designed to interface
directly with high speed A/D converters. The back page of
this data sheet shows the LTC6420-20 driving an LTC2285,
which is a dual 14-bit, 125Msps ADC.
The V
V
level of 1.5V. Both ICs are powered from the same 3V
supply voltage.
The inputs to the LTC6420-20 can be confi gured in various
ways, as described in the Input Impedance and Matching
section of this data sheet. The outputs of the LTC6420-20
may be connected directly to the analog inputs of an ADC,
or a simple lowpass or bandpass fi lter network may be
inserted to reduce out-of-band noise.
Test Circuits
Due to the fully-differential design of the LTC6420 and
its usefulness in applications with differing characteristic
specifi cations, two test circuits are used to generate the
information in this data sheet. Test Circuit A is DC1299, a
two-port demonstration circuit for the LTC6420/LTC6421
family. The schematic and silkscreen are shown in Figure 4.
This circuit includes input and output transformers (baluns)
for single-ended-to-differential conversion and impedance
transformation, allowing direct hook-up to a 2-port network
analyzer. There are also series resistors at the output to
avoid loading the amplifi er directly with a 50Ω load. Due
to the input and output transformers, the –3dB bandwidth
is reduced from 1.8GHz to approximately 1.3GHz.
Test Circuit B uses a 4-port network analyzer to measure
S-parameters and gain/phase response. This removes the
effects of the wideband baluns and associated circuitry,
for a true picture of the >1GHz S-parameters and AC
characteristics.
CM
pins of the LTC2285, which provide a DC voltage
OCM
pins of the LTC6420-20 are connected to the
LTC6420-20
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