MMA16XXKW FREESCALE [Freescale Semiconductor, Inc], MMA16XXKW Datasheet - Page 15

• Manufacturer Part Number: MMA16XXKW
• Description: DSI Inertial Sensor
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

3.1.3 Device Configuration Register (DEVCFG)
register is included in the user register CRC check. Refer to
ble OTP array.
3.1.3.1
mitted in response to the Request ID DSI command. Reference
DSI command. This bit can be factory or user programmed.
3.1.3.2
Section 3.2.2
3.1.4 Device Configuration Register 1 (DEVCFG1)
register is included in the user register CRC check. Refer to
Table 5. Device Control Register 1
3.1.4.1
assembly specific information. These bits can be factory or user programmed.
3.1.4.2
Enable Self-Test Stimulus DSI commands. The transmitted values are qualified by the LOCK_U bit as shown in the table below.
These bits can be factory or user programmed.
Sensors
Freescale Semiconductor, Inc.
RA[3:0]
The Device configuration register is a user programmable OTP register which contains device configuration information. This
The Device ID Bit is a user programmable bit which allows the user to select between 2 device IDs. The Device ID is trans-
The User Configuration CRC bits contain the 3-bit CRC used for verification of the user programmable OTP array. Reference
The Device configuration register is a user programmable OTP register which contains device configuration information. This
The User Specific Data bits have no impact on the device function or performance. The bits can be programmed with user or
The Attribute Bits are user defined bits which are transmitted in response to the Request Status, Disable Self-Test Stimulus or
Table 4. Device Control Register
$06
RA[3:0]
Factory Default
Location
$05
Factory Default
Location
for details regarding the CRC for the user programmable OTP array. These bits can be factory or user programmed.
Device ID Bit (DEVCFG[7])
User Configuration CRC (CRC_U[2:0], DEVCFG[2:0])
Register
User Specific Data 00 Bits (UD00[5:0], DEVCFG1[7:2])
Attribute Bits (AT_OTP[1:0], DEVCFG1[1:0])
DEVCFG1
Register
DEVCFG
LOCK_U
WA[3:0]
0
1
Bnk2 $06
WA[3:0]
Bnk0 $0A
UD00[5]
AT_OTP[1]
7
0
DEVID
7
1
DEVID
X
0
0
1
1
DEVCFG1 Values
0
1
UD00[4]
6
0
6
0
0
AT_OTP[0]
UD00[3]
Section 3.2.2
Section 3.2.2
5
0
5
0
0
X
0
1
0
1
Section 4.2.1.5
Device ID
‘00110’
‘00100’
UD00[2]
4
0
4
0
0
for details regarding the CRC for the user programma-
for details.
Bit
Bit
WA[3:0]
WA[3:0]
Bnk0 $09
Bnk1 $06
DSI Transmitted Values
AT[1]
for more information regarding the Request ID
1
0
0
1
1
UD00[1]
3
0
0
3
0
CRC_U[2] CRC_U[1] CRC_U[0]
AT[0]
UD00[0]
0
0
1
0
1
2
0
2
0
AT_OTP[1] AT_OTP[0]
1
0
1
0
MMA16xxKW
0
0
0
0
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