MMA26XXKW FREESCALE [Freescale Semiconductor, Inc], MMA26XXKW Datasheet - Page 39

• Manufacturer Part Number: MMA26XXKW
• Description: DSI Inertial Sensor
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

4.2.1.11
trol command with the DSI Global Address of ‘0000’, but does not provide a response.
Table 41. Format Control Command Bit Definitions
Table 43. Format Control Response Bit Definitions
register are also indicated.
Sensors
Freescale Semiconductor, Inc.
Table 44. Format Control Register Values
Table 40. Format Control Command
Table 42. Long Response - Format Control Command
D[15]
D[7]
R/W
Short Word Data Length (8 to 15)
A[3]
The Format Control command is supported in the following command formats:
The device ignores the Format Control command if the command is in any other format. The device supports the Format Con-
The format control registers defined in the DSI Bus Standard V2.5 are shown in
CRC Polynomial - High Nibble
Format Control Register
CRC Polynomial - Low Nibble
Bit Field
Bit Field
FD[3:0]
FA[2:0]
FD[3:0]
FA[2:0]
C[3:0]
A[3:0]
A[3:0]
R/W
R/W
CRC Length (0 to 8)
Seed - High Nibble
Seed - Low Nibble
Format Selection
D[14]
FA[2]
D[6]
A[2]
Reserved
• Standard Long Command
• Enhanced Long Command as configured by the Format Control Command (Reference
Format Control Command
D[13]
FA[1]
D[5]
A[1]
Format Control Command = ‘1010’
DSI device address. This field contains the device address. This field must match the internal programmed address field. Otherwise, the
command is ignored.
Data to be written to the Format Control Register addressed by FA[2:0] if the R/W bit is set to ‘1’.
The Address of the Format Control Register to read or written.
Read/Write determines if the register at address FA[2:0] is to be read or written.
1 - Write FD[3:0] to the Format Control Register addressed by FA[2:0]
0 - Read the Format Control Register addressed by FA[2:0]
The contents of the Format Control Register addressed by FA[2:0].
The Address of the Format Control Register that was read or written.
Read/Write indicates if the register at address FA[2:0] was read or written.
1 - FD[3:0] contains the data written to the Format Control Register addressed by FA[2:0]
0 - FD[3:0] contains the contents for the Format Control Register addressed by FA[2:0]
DSI device address. This field contains the device address.
D[12]
FA[0]
D[4]
A[0]
Data
D[11]
FD[3]
FA[2] FA[1] FA[0] FD[3] FD[2] FD[1] FD[0] FD[3] FD[2] FD[1] FD[0]
D[3]
Register Address
0
0
0
0
0
1
1
1
1
D[10]
FD[2]
D[2]
0
0
1
1
0
0
1
1
1
FD[1]
D[1]
D[9]
0
1
0
1
0
1
0
1
1
FD[0]
0
0
1
0
0
1
0
0
D[0]
D[8]
Response
0
Reset Values
0
0
0
0
1
0
0
0
A[3]
D[7]
R/W
A[3]
0
0
1
0
0
0
0
0
FA[2]
A[2]
D[6]
A[2]
Definition
Definition
Address
1
1
0
0
0
0
0
0
FA[1]
A[1]
D[5]
A[1]
0
0
1
0
0
1
0
0
DSI Standard Values
FA[0]
A[0]
D[4]
A[0]
Table
0
0
0
0
1
0
0
0
44. The reset values assigned to each
FD[3]
C[3]
D[3]
1
0
0
1
0
0
0
0
0
FD[2]
C[2]
D[2]
Command
0
1
1
0
0
0
0
0
0
Section
FD[1]
Short Command Length = 8
C[1]
D[1]
CRC Polynomial = X
1
CRC Length = 4
Seed = ‘1010’
Definition
4.2.1.11)
FD[0]
C[0]
D[0]
0
N/A
N/A
MMA26xxKW
0 to 8 bits
0 to 8 bits
CRC
CRC
4
+ 1
39