PI6C184-02 PERICOM [Pericom Semiconductor Corporation], PI6C184-02 Datasheet - Page 3

• Manufacturer Part Number: PI6C184-02
• Description: Precision 1-13 Clock Buffer
• Manufacturer: PERICOM [Pericom Semiconductor Corporation]

1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
2-Wire I
The I
clock output and test mode enable.
The PI6C184-02 is a slave receiver device. It can not be read
back. Sub addressing is not supported. All preceding bytes
must be sent in order to change one of the control bytes.
Every bite put on the SDATA line must be 8-bits long (MSB
first), followed by an acknowledge bit generated by the
receiving device.
During normal data transfers Sdata changes only when SCLK
is LOW. Exceptions: A HIGH to LOW transition on SDATA
while SCLK is HIGH indicates a “start” condition. A LOW to
HIGH transition on SDATA while SCLK is HIGH is a “stop”
condition and indicates the end of a data transfer cycle.
Byte1: SDRAM Active/Inactive Register
(1 = enable, 0 = disable)
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Supply Current (V
Storage Temperature ................................................ –65°C to +150°C
Ambient Temperature with Power Applied ............. –0°C to +70°C
3.3V Supply Voltage to Ground Potential ............... –0.5V to +4.6V
DC Input Voltage ..................................................... –0.5V to +4.6V
2
C interface permits individual enable/disable of each
2
C Control
DD
= +3.465V, Cload = max)
3
Each data transfer is initiated with a start condition and ended
with a stop condition. The first byte after a start condition is
always a 7-bit address byte followed by a read/write bit. (HIGH
= read from addressed device, LOW = write to addressed
device). If the device’s own address is detected, PI6C184-02
generates an acknowledge by pulling SDATA line LOW during
ninth clock pulse, then accepts the following data bytes until
another start or stop condition is detected.
Following acknowledgement of the address byte (D2), two more
bytes must be sent:
Although the data bits on these two bytes are “don’t care,” they
must be sent and acknowledged.
Byte2: Optional Register for Possible Future
Requirements (1 = enable, 0 = disable)
1. “Command Code” byte, and
2. “Byte Count” byte.
Note:
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the device. This
is a stress rating only and functional operation of the device
at these or any other conditions above those indicated in the
operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for ex-
tended periods may affect reliability.
Precision 1-13 Clock Buffer
PI6C184-02
PS8319
05/03/00
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