ICS8430-71B ICST [Integrated Circuit Systems], ICS8430-71B Datasheet - Page 12

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ICS8430-71B

Manufacturer Part Number
ICS8430-71B
Description
700MHZ, LOW JITTER, CRYSTAL INTERFACE / LVCMOS-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
Manufacturer
ICST [Integrated Circuit Systems]
Datasheet
This section provides information on power dissipation and junction temperature for the ICS8430B-71.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS8430B-71 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device. The maximum recommended junction temperature for HiPerClockS
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θ
moderate air flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 42.1°C/W per Table 8 below.
Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,
and the type of board (single layer or multi-layer).
T
8430BY -71
ABLE
The equation for Tj is as follows: Tj = θ
Tj = Junction Temperature
θ
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
70°C + 0.545W * 42.1°C/W = 93°C. This is well below the limit of 125°C.
JA
A
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
= Ambient Temperature
8. T
= Junction-to-Ambient Thermal Resistance
Power (core)
Power (outputs)
If all outputs are loaded, the total power is 2 * 30mW = 60mW
Total Power
HERMAL
Integrated
Circuit
Systems, Inc.
R
MAX
ESISTANCE
_MAX
MAX
= V
= 30mW/Loaded Output pair
(3.465V, with all outputs switching) = 485mW + 60mW = 545mW
CC_MAX
θ θ θ θ θ
* I
JA
EE_MAX
FOR
θ θ θ θ θ
JA
P
CC
32-
= 3.465V * 140mA = 485mW
JA
by Velocity (Linear Feet per Minute)
www.icst.com/products/hiperclocks.html
= 3.3V + 5% = 3.465V, which gives worst case results.
* Pd_total + T
OWER
PRELIMINARY
PIN
LVCMOS-
LQFP, F
C
A
ONSIDERATIONS
ORCED
12
TO
700MH
C
-3.3V LVPECL F
ONVECTION
67.8°C/W
47.9°C/W
TM
0
devices is 125°C.
Z
, L
OW
55.9°C/W
42.1°C/W
J
200
ITTER
REQUENCY
JA
, C
ICS8430B-71
must be used. Assuming a
RYSTAL
50.1°C/W
39.4°C/W
500
REV. A SEPTEMBER 20, 2005
S
YNTHESIZER
I
NTERFACE
/

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