KS8999_11 MICREL [Micrel Semiconductor], KS8999_11 Datasheet - Page 17

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KS8999_11

Manufacturer Part Number
KS8999_11
Description
Integrated 9-Port 10/100 Switch with PHY and Frame Buffer
Manufacturer
MICREL [Micrel Semiconductor]
Datasheet
January 2005
Micrel, Inc.
Group
CTRL
TEST
CFGMODE
I/O Names
LED[7][3]
LED[7][2]
LED[7][1]
LED[7][0]
LED[8][3]
LED[8][2]
LED[8][1]
LED[8][0]
MRXD[3]
MRXD[2]
MRXD[1]
MRXD[0]
SCANEN
MUX[1:2]
MIIS[1:0]
TESTEN
PRSV
AOUT
EN1P
RST#
SDA
SCL
X1
X2
Active Status
Clock
Clock
Clock
I/O
H
H
H
H
H
H
H
H
L
Description
Programs flow control D = No flow control, F/U = Flow control enabled
(default)
Programs broadcast storm protection. D = 5% broadcast frames allowed, F/U
= Unlimited broadcast frames (default)
Programs buffer sharing feature. D = Equal amount of buffers per port (113
buffers), F/U = Share buffers up to 512 buffers on a single port (default)
Reserved – use float configuration
Programs address aging.
D = Aging disabled, F/U = Enable 5 minute aging (default)
Programs frame length enforcement. D = Max length for VLAN is 1522 bytes
and without VLAN is 1518 bytes F/U = Max length is 1536 bytes (default)
Reserved
Programs half-duplex back pressure. D = No half-duplex back pressure,
F/U = Half-duplex back pressure enabled (default)
Programs port 9 speed D = 10Mbps, F/U = 100Mbps (default)
Programs port 9 duplex D = Half-duplex, F/U = Full duplex (default)
Programs port 9 flow control D = Flow control, F/U = No flow control (default)
D = reserved, F/U = normal operation (default)
Enable 802.1p for all ports –this enables QoS based on the priority field in the
layer 2 header.
0 = 802.1p selected by port in EEPROM
1 = Use 802.1p priority field unless disabled in EEPROM
Note: This is also controlled by the EEPROM registers (registers 4-12 bit 4).
The values in the EEPROM supersede this pin. Also, if the priority selection is
unaltered in the EEPROM registers (register 3 bits 0-7) then values above 3
are considered high priority and less than 4 are low priority.
MII mode selection –allows the MII to run in the following modes
MIIS
1 0
0 0
0 1
1 0
1 1
Priority buffer reserve –reserves 6KB of buffer space for the priority traffic if
enabled. 0 = No priority reserve 1 = Reserve 6KB for priority traffic
Note: This is also controlled by the EEPROM registers (register 2 bit 1). The
value in the EEPROM supersedes this pin.
Selects between EEPROM or processor for programming interface.
0 = Processor interface
1 = EEPROM interface or not programmed on this interface (SCL / SDA not
used)
External crystal or clock input
Used when other polarity of crystal is needed. This is unused for a normal
clock input.
Clock for EEPROM
Serial data for EEPROM
System reset
Factory test input –tie low for normal operation
Factory test input –tie low for normal operation
Factory test input –leave open for normal operation
Factory test output –leave open for normal operation
Operating mode
Disable MII interface
Reverse MII
Forward MII
7 wire mode (SNI)
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KS8999
KS8999

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