IS61/64WV20488BLL ISSI [Integrated Silicon Solution, Inc], IS61/64WV20488BLL Datasheet - Page 12

no-image

IS61/64WV20488BLL

Manufacturer Part Number
IS61/64WV20488BLL
Description
2M x 8 HIGH-SPEED CMOS STATIC RAM
Manufacturer
ISSI [Integrated Silicon Solution, Inc]
Datasheet
IS61WV20488ALL, IS61/64WV20488BLL
WRITE CYCLE SWITCHING CHARACTERISTICS
Notes:
1. Test conditions assume signal transition times of 1.5ns or less, timing reference levels of 1.25V, input
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100%
3. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid
12
Symbol
t
t
t
t
t
t
t
t
t
t
t
pulse levels of 0.4V to V
tested.
states to initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and
Hold timing are referenced to the rising or falling edge of the signal that terminates the write.
wc
sce
aw
ha
sa
Pwe
Pwe
sd
hd
hzwe
lzwe
1
2
(3)
(3)
Parameter
Write Cycle Time
CE to Write End
Address Setup Time
to Write End
Address Hold from Write End
Address Setup Time
WE Pulse Width (OE = HIGH)
WE Pulse Width (OE = LOW)
Data Setup to Write End
Data Hold from Write End
WE LOW to High-Z Output
WE HIGH to Low-Z Output
dd
-0.3V and output loading specified in Figure 1.
Integrated Silicon Solution, Inc. — www.issi.com —
Min.
20
12
12
12
17
0
0
0
9
3
-20 ns
(1,2)
Max.
9
(Over Operating Range)
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1-800-379-4774
08/04/2010
Rev. B

Related parts for IS61/64WV20488BLL