IS61C64AH-15U ICSI [Integrated Circuit Solution Inc], IS61C64AH-15U Datasheet - Page 7

• Manufacturer Part Number: IS61C64AH-15U
• Description: 8K x 8 HIGH-SPEED CMOS STATIC RAM
• Manufacturer: ICSI [Integrated Circuit Solution Inc]

AC WAVEFORMS
WRITE CYCLE NO. 2
WRITE CYCLE NO. 3
Notes:
1. The internal write time is defined by the overlap of CE1 LOW, CE2 HIGH and WE LOW. All signals must be in valid states to
2. I/O will assume the High-Z state if OE = V
IS61C64AH
Integrated Circuit Solution Inc.
SR001-B
initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the
rising or falling edge of the signal that terminates the write.
ADDRESS
ADDRESS
D
D
CE1
CE2
CE1
CE2
OUT
OUT
WE
WE
D
D
OE
OE
IN
IN
LOW
LOW
HIGH
LOW
HIGH
(OE is HIGH During Write Cycle)
(OE is LOW During Write Cycle)
t
SA
t
DATA UNDEFINED
DATA UNDEFINED
SA
IH
.
VALID ADDRESS
t
t
t
t
AW
AW
HZWE
HZWE
VALID ADDRESS
t
t
PWE1
WC
t
(1)
t
(1,2)
PWE2
WC
HIGH-Z
HIGH-Z
t
t
SD
SD
DATA
DATA
IN
IN
VALID
VALID
t
t
HD
HD
t
t
LZWE
LZWE
t
t
HA
HA
7
1
2
3
4
5
6
7
8
9
10
11
12