ICS8535AG-21 ICST [Integrated Circuit Systems], ICS8535AG-21 Datasheet - Page 10

• Manufacturer Part Number: ICS8535AG-21
• Description: LOW SKEW, 1-TO-2 LVCMOS/LVTTL-TO-3.3V LVPECL FANOUT BUFFER
• Manufacturer: ICST [Integrated Circuit Systems]

This section provides information on power dissipation and junction temperature for the ICS8535-21.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS8535-21 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of
the device. The maximum recommended junction temperature for HiPerClockS
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
moderate air low of 200 linear feet per minute and a multi-layer board, the appropriate value is 85.5°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:
This calculation is only an example, and the Tj will obviously vary depending on the number of outputs that are loaded, supply
voltage, air flow, and the type of board (single layer or multi-layer).
T
8535AG-21
ABLE
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
6. T
Power (core)
Power (outputs)
If all outputs are loaded, the total power is 2 x 30mW = 60mW
Total Power
The equation for Tj is as follows: Tj =
Tj = Junction Temperature
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
70°C + 0.233W * 85.5°C/W = 90°C. This is well below the limit of 125°C.
JA
A
= Ambient Temperature
HERMAL
= Junction-to-Ambient Thermal Resistance
Integrated
Circuit
Systems, Inc.
R
MAX
ESISTANCE
_MAX
MAX
= V
(3.465V, with all outputs switching) = 173.25mW + 60mW = 233.25mW
= 30mW/Loaded Output pair
CC_MAX
JA
* I
FOR
EE_MAX
JA
14-
P
CC
by Velocity (Linear Feet per Minute)
= 3.465V * 50mA = 173.25mW
www.icst.com/products/hiperclocks.html
= 3.3V + 5% = 3.465V, which gives worst case results.
PIN
OWER
JA
TSSOP, F
LVCMOS/LVTTL-
* Pd_total + T
C
ONSIDERATIONS
ORCED
10
A
146.4°C/W
93.2°C/W
C
0
ONVECTION
TO
TM
-3.3V LVPECL F
devices is 125°C.
125.2°C/W
85.5°C/W
200
JA
L
must be used. Assuming a
112.1°C/W
ICS8535-21
81.2°C/W
OW
500
ANOUT
S
REV. A OCTOBER 20, 2004
KEW
, 1-
B
UFFER
TO
-2