CY7C1354A-133BGI CYPRESS [Cypress Semiconductor], CY7C1354A-133BGI Datasheet - Page 8

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CY7C1354A-133BGI

Manufacturer Part Number
CY7C1354A-133BGI
Description
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
Document #: 38-05161Rev. *E
Pin Descriptions—512K × 18
Partial Truth Table for Read/Write
Interleaved Burst Address Table
(MODE = V
Notes:
Read
No Write
Write Byte a (DQa)
Write Byte b (DQb)
Write Byte c (DQc)
Write Byte d (DQd}
Write all bytes
2. L means logic LOW. H means logic HIGH. X means Don’t Care.
3. Multiple bytes may be selected during the same cycle.
4. BWc and BWd apply to 256K × 36 device only.
5. Upon completion of the Burst sequence, the counter wraps around to its initial state and continues counting.
75, 78, 79, 84,
51-53, 56, 57,
1-3, 6, 7, 25,
TQFP Pins
(external)
512K × 18
Address
A...A
A...A
A...A
A...A
28-30,
95, 96
First
00
01
10
11
CC
4A, 1B, 7B, 1C,
7C, 2D, 4D, 7D,
6G, 2H, 7H, 3J,
4L, 7L, 6M, 2N,
1E, 6E, 2F, 1G,
7N, 1P, 6P, 1R,
5J, 1K, 6K, 2L,
7R, 1T, 4T, 6U
or NC)
(internal)
Address
PBGA Pins
Second
[3]
512K × 18
A...A
A...A
A...A
[3]
[3]
[3]
A...A
Function
01
00
11
10
(internal)
Name
Address
A...A
A...A
A...A
A...A
Pin
NC
Third
(continued)
10
11
00
01
[2]
Type
(internal)
Address
Fourth
A...A
A...A
A...A
A...A
10
01
00
11
No Connect: These signals are not internally connected. It can be left
floating or be connected to V
[5]
WEN
H
L
L
L
L
L
L
Linear Burst Address Table
(MODE = V
(external)
Address
A...A
A...A
A...A
A...A
First
00
01
10
11
BWa
X
H
H
H
H
L
L
SS
Pin Description
)
(internal)
Address
CC
Second
A...A
A...A
A...A
A...A
or to GND.
BWb
01
10
11
00
H
H
H
H
X
L
L
(internal)
Address
A...A
A...A
A...A
A...A
Third
BWc
H
H
H
H
10
00
01
X
L
L
11
CY7C1354A
CY7C1356A
[4]
Page 8 of 28
(internal)
Address
Fourth
A...A
A...A
A...A
A...A
BWd
H
H
H
H
X
L
L
11
00
01
10
[4]
[5]

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