ICS91305YGILF-T ICSI [Integrated Circuit Solution Inc], ICS91305YGILF-T Datasheet - Page 4

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ICS91305YGILF-T

Manufacturer Part Number
ICS91305YGILF-T
Description
High Performance Communication Buffer
Manufacturer
ICSI [Integrated Circuit Solution Inc]
Datasheet
ICS91305I
Notes:
1. Guaranteed by design and characterization. Not subject to 100% test.
2. REF input has a threshold voltage of 1.4V
3. All parameters expected with loaded outputs
0691F—06/03/05
Switching Characteristics
Output period
Input period
Duty Cycle
Duty Cycle
Rise Time
Fall Time
Delay, REF Rising
Edge to CLKOUT
Rising Edge
Output to Output
Skew
Device to Device
Skew
Cycle to Cycle
PLL Lock Time
Jitter
Jitter; Absolute
Jitter
Jitter; 1 - Sigma
PARAMETER
1
1
1
1
1
1
1
1
1, 2
1
1
Tdsk-Tdsk
Tcyc-Tcyc
SYMBOL
Tskew
Tjabs
t
Tj1s
Dt2
Dt1
Dr1
LOCK
tr1
tf1
t1
t1
@ 10,000 cycles
@ 10,000 cycles
Measured at 1.4V; CL=30pF
Measured at VDD/2 Fout
Measured between 0.8V and 2.0V:
Measured between 2.0V and 0.8V;
Measured at 1.4V
Measured at VDD/2 on the
Measured at 66.66 MHz, loaded
presented on REF pin
With CL=30pF
With CL=30pF
<66.6MHz
CL=30pF
CL=30pF
All outputs equally loaded,
CL=20pF
CLKOUT pins of devices
outputs
Stable power supply, valid clock
C
C
L
L
= 30pF
= 30pF
CONDITION
4
100.00
100.00
40.0
-200
MIN
(10)
(10)
45
TYP
1.2
1.2
50
50
70
14
0
0
(133)
(133)
±350
MAX
250
700
200
200
7.5
7.5
1.5
1.5
1.0
60
55
60
UNITS
(MHz)
(MHz)
ms
ns
ns
ns
ns
ps
ps
ps
ps
ps
ps
%
%

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