MAX3107_10 MAXIM [Maxim Integrated Products], MAX3107_10 Datasheet - Page 41

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MAX3107_10

Manufacturer Part Number
MAX3107_10
Description
SPI/I2C UART with 128-Word FIFOs and Internal Oscillator
Manufacturer
MAXIM [Maxim Integrated Products]
Datasheet
PLLConfig—PLL Configuration Register
Table 4. PLLFactor[1:0] Selection Guide
Bits 7 and 6: PLLFactor[1:0]
The two PLLFactor[1:0] bits allow programming with select PLL’s multiplication factor. The input and output frequencies
of the PLL have to be limited to the ranges shown in Table 4. Enable the PLL through CLKSource[2].
Bits 5–0: PreDiv[5:0]
The six PreDiv[5:0] bits allow programming the divisor of the PLL’s predivider. The divisor must be chosen such that
the output frequency of the predivider, which equals the PLL’s input frequency, is limited to the ranges shown in Table 4.
The output frequency of the internal oscillator or the input frequency of XIN is f
PreDiv is an integer that must be in the range of 1 to 63.
Figure 14. PLL Signal Path
ADDRESS:
MODE:
RESET
PLLFactor1
NAME
BIT
0
0
1
1
PLLFactor1
______________________________________________________________________________________
7
0
PLLFactor0
0
1
0
1
0x1A
R/W
PLLFactor0
SPI/I
6
0
f
CLK
MULTIPLICATION
PREDIVIDER
FACTOR
PreDiv5
2
144
48
96
5
0
C UART with 128-Word FIFOs
6
f
PLLIN
PreDiv4
4
0
PLL
500kHz
850kHz
425kHz
390kHz
and Internal Oscillator
MIN
f
PreDiv3
REF
f
PLLIN
3
0
FRACTIONAL
GENERATOR
BAUD-RATE
800kHz
1.2MHz
667kHz
1MHz
MAX
CLK;
PreDiv2
2
0
f
PLLIN
40.8MHz
40.8MHz
56MHz
3MHz
MIN
= f
PreDiv1
CLK
1
0
/PreDiv (Figure 4).
f
REF
4.8MHz
56MHz
96MHz
96MHz
MAX
PreDiv0
0
1
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