CY7C53120 CYPRESS [Cypress Semiconductor], CY7C53120 Datasheet
CY7C53120
Available stocks
Related parts for CY7C53120
CY7C53120 Summary of contents
Page 1
... Addresses external memory (CY7C53150) • (CY7C53120E2 (CY7C53120E4) of ROM containing LonTalk network protocol firmware • Maximum input clock operation of 20 MHz (CY7C53150), 10 MHz (CY7C53120E2), 40 MHz (CY7C53120E4) over a – ...
Page 2
... CY7C53150-20AI CY7C53150 CY7C53120 32 CP4 CP3 31 30 CP2 29 CP1 28 CP0 [ CLK1 24 23 CLK2 ...
Page 3
... IO10 RESET CP4 DD 42 IO4 CP3 CP1 IO3 43 CP0 [ CP2 PIN 1 INDICATOR CY7C53150 CY7C53120 44-lead QFP 22 NC CP1 21 CP0 CP2 18 CY7C53120Ex-yyAI CLK1 15 CLK2 Page ...
Page 4
... Memory Usage All Neuron chips require system firmware to be present when they are powered up. In the case of the CY7C53120 family, this firmware is preprogrammed in the factory in an on-chip ROM. In the case of the CY7C53150, the system firmware must be present in the first off-chip nonvolatile memory such as Flash, EPROM, EEPROM, or NVRAM ...
Page 5
... In addition, system firmware version 13.1 or higher is able to aggregate writes to eight successive address locations into a single write for CY7C53120E4 devices. For example code is downloaded over the network, the firmware would execute only 512 writes rather than 4,096. ...
Page 6
... LVI Trip Point ( Part Number CY7C53120E2, CY7C53120E4, and CY7C53150 Notes: 11. Standard outputs are IO4–IO10, CP0, CP1, and CP4. (RESET is an open drain input/output. CLK2 must have < load.) For CY7C53150, standard outputs also include A0–A15, D0–D7, E, and R/W. 12. IO4–IO7 and SERVICE have configurable pull-ups. RESET has a permanent pull-up. ...
Page 7
... for for A0–A15, D0–D7, and R for all other signals 2.0V 0.8V < 5.25V. DD CY7C53150 CY7C53120 (V = 4. –40°C to+ 85° Min. Max. 100 3200 t /2 – cyc cyc t /2 – ...
Page 8
... LOAD Address DSR Data In t DHR t t DHR t DHZ Memory READ Memory WRITE CY7C53150 CY7C53120 / Address Address DDW t DDZ DDW t DHW Data Out Memory WRITE DDZ t DHZ t DHW ...
Page 9
... CY7C53120E4-40AI 4 Notes: 23. All parts contain 2KB of SRAM. 24. CY7C53120E2 firmware is bit-for-bit identical with Motorola MC143120E2 firmware. 25. CY7C53150 may be used with 20-MHz input clock only if the firmware in external memory is version 13 or later. 26. CY7C53120E4 requires upgraded LonBuilder and NodeBuilder software. Document #: 38-10001 Rev ...
Page 10
... Package Diagrams 64-lead Thin Plastic Quad Flat Pack (14 × 14 × 1.4 mm) A65 Document #: 38-10001 Rev. *D 44-lead Thin Plastic Quad Flat Pack A44 CY7C53150 CY7C53120 51-85064-B 51-85046-B Page ...
Page 11
... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. 32-lead (450-mil) Molded SOIC S34 CY7C53150 CY7C53120 51-85081-A Page ...
Page 12
... Document History Page Document Title: CY7C53150/CY7C53120 Neuron Document Number: 38-10001 REV. ECN NO. Issue Date ** 111472 11/28/01 *A 111990 02/06/02 *B 114465 04/24/02 *C 115269 04/26/02 *D 124450 03/25/03 Document #: 38-10001 Rev. *D ® Chip Network Processor Orig. of Change Description of Change DSG Change from Spec number: 38-00891 to 38-10001 CFB Changed the max. cur rent values Specified the Flash endurance of “ ...