CY7C63723 CYPRESS [Cypress Semiconductor], CY7C63723 Datasheet - Page 2

• Manufacturer Part Number: CY7C63723
• Manufacturer: CYPRESS [Cypress Semiconductor]

References
1. 38-08022 CY7C63722/23/43 enCoRe™ USB Combination Low-speed USB & PS/2 Peripheral Controller
datasheet.
• TRIGGER CONDITION(S)
• SCOPE OF IMPACT
• WORKAROUND
• FIX STATUS
When a rising edge interrupt is enabled for a GPIO pin, reading the GPIO Port 1 coincident to a falling edge
of that GPIO signal may generated a false GPIO intterupt
Reading the GPIO Port 1 when either rising or falling edge interrupts are enabled for a GPIO pin.
The chip enters the GPIO Interrupt Service Routine (ISR) in error.
Workarounds will need to be tailored to individual applications based on the flexibility of changing the GPIO
usage, the timing of the GPIO interrupt sources and firmware interrupt latencies.
No silicon fix is planned.
• PARAMETERS AFFECTED
Interrupts
pin with Rising Edge GPIO
GPIO Interrupt Signal
Any Port 0 or Port 1 GPIO
Note 1: Port 1 Read is an internal signal that is asserted when Port 1
is read with an "IORD 01h" instruction.
Note 2: The GPIO Interrupt signal is an internal signal. The arrow
indicates that a GPIO interrupt is triggered.
Port 1 Read Signal
(See Note 2)
Interrupt Enabled
(See Note 1)
Interrupt Trigger
Proper GPIO
2
False GPIO interrupt
on a Falling edge
CY7C637xx