MC74HC73ANG ONSEMI [ON Semiconductor], MC74HC73ANG Datasheet

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MC74HC73ANG

Manufacturer Part Number
MC74HC73ANG
Description
Dual J-K Flip-Flop with Reset High−Performance Silicon−Gate CMOS
Manufacturer
ONSEMI [ON Semiconductor]
Datasheet
1.MC74HC73ANG.pdf (9 pages)
MC74HC73A
Dual J-K Flip-Flop with
Reset
High−Performance Silicon−Gate CMOS
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LSTTL outputs.
asynchronous reset.
different pinout.
Features
•
•
•
•
•
•
•
•
© Semiconductor Components Industries, LLC, 2009
December, 2009 − Rev. 7
Reset Clock
The MC74HC73A is identical in pinout to the LS73. The device
Each flip−flop is negative−edge clocked and has an active−low
The MC74HC73A is identical in function to the HC107, but has a
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0 mA
High Noise Immunity Characteristic of CMOS Devices
In Compliance with the JEDEC Standard No. 7.0 A Requirements
Chip Complexity: 92 FETs or 23 Equivalent Gates
These are Pb−Free Devices
CLOCK 1
CLOCK 2
RESET 1
RESET 2
H
H
H
H
H
H
H
L
K1
K2
J1
J2
FUNCTION TABLE
Inputs
H
X
L
LOGIC DIAGRAM
14
10
1
3
2
7
5
6
X
H
H
X
X
X
J
L
L
PIN 4 = V
PIN 11 = GND
K
X
H
H
X
X
X
L
L
CC
No Change
No Change
No Change
No Change
Outputs
Q
H
L
L
Toggle
12
13
9
8
Q
H
H
L
Q1
Q1
Q2
Q2
CLOCK 1
CLOCK 2
RESET 1
RESET 2
V
PIN ASSIGNMENT
K1
CC
J2
1
2
3
4
5
6
7
1
14
13
12
10
11
9
8
J1
Q1
Q1
GND
K2
Q2
Q2
14
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
14
14
1
(Note: Microdot may be in either location)
1
ORDERING INFORMATION
1
A
WL, L
YY, Y
WW, W
G or G
http://onsemi.com
CASE 646
CASE 948G
N SUFFIX
CASE 751A
DT SUFFIX
TSSOP−14
PDIP−14
D SUFFIX
SOIC−14
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
Publication Order Number:
14
1
14
1
14
DIAGRAMS
MC74HC73AN
AWLYYWWG
1
MARKING
AWLYWW
MC74HC73/D
HC73AG
ALYWG
73A
HC
G

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MC74HC73ANG Summary of contents

Page 1

MC74HC73A Dual J-K Flip-Flop with Reset High−Performance Silicon−Gate CMOS The MC74HC73A is identical in pinout to the LS73. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. Each flip−flop is negative−edge ...

Page 2

MAXIMUM RATINGS* Symbol Parameter V DC Supply Voltage (Referenced to GND Input Voltage (Referenced to GND Output Voltage (Referenced to GND) out I DC Input Current, per Pin Output Current, per ...

Page 3

AC ELECTRICAL CHARACTERISTICS Symbol f Maximum Clock Frequency (50% Duty Cycle) max (Figures 1 and Maximum Propagation Delay, Clock PLH (Figures 1 and 4) t PHL t , Maximum Propagation Delay, Reset to ...

Page 4

CLOCK 10 1/f max t t PLH PHL 90 50% 10 TLH THL Figure 1. VALID CLOCK 50% Figure ...

Page 5

... ORDERING INFORMATION Device MC74HC73ANG MC74HC73ADG MC74HC73ADR2G MC74HC73ADTR2G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb−Free. Package PDIP−14 (Pb−Free) SOIC−14 (Pb−Free) SOIC−14 (Pb− ...

Page 6

−T− SEATING PLANE 0.13 (0.005) PACKAGE DIMENSIONS PDIP−14 CASE 646−06 ISSUE http://onsemi.com 6 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI ...

Page 7

G −T− SEATING 14 PL PLANE 0.25 (0.010 14X 0.58 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques ...

Page 8

K 14X REF 0.10 (0.004) 0.15 (0.006 L PIN 1 IDENT. 1 0.15 (0.006 −V− C 0.10 (0.004) −T− G SEATING D PLANE 14X 0.36 *For additional information on our ...

Page 9

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for ...

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