MC74HC73D MOTOROLA [Motorola, Inc], MC74HC73D Datasheet
MC74HC73D
Manufacturer Part Number
MC74HC73D
Description
Dual J-K Flip-Flop with Reset
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC74HC73D.pdf
(5 pages)
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Dual J-K Flip-Flop with Reset
High–Performance Silicon–Gate CMOS
compatible with standard CMOS outputs; with pullup resistors, they are
compatible with LSTTL outputs.
nous reset.
pinout.
10/95
Motorola, Inc. 1995
The MC74HC73 is identical in pinout to the LS73. The device inputs are
Each flip flop is negative–edge clocked and has an active–low asynchro-
The MC74HC73 is identical in function to the HC107, but has a different
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2 to 6 V
Low Input Current: 1 A
High Noise Immunity Characteristic of CMOS Devices
In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
Chip Complexity: 92 FETs or 23 Equivalent Gates
CLOCK 1
CLOCK 2
RESET 1
RESET 2
K1
K2
J1
J2
LOGIC DIAGRAM
14
10
1
3
2
7
5
6
PIN 4 = V CC
PIN 11 = GND
12
13
9
8
Q1
Q1
Q2
Q2
1
REV 6
14
Reset Clock
14
H
H
H
H
H
H
H
L
1
CLOCK 1
CLOCK 2
RESET 1
RESET 2
MC74HC73
ORDERING INFORMATION
1
MC74HCXXN
MC74HCXXD
V CC
PIN ASSIGNMENT
FUNCTION TABLE
Inputs
K1
H
J2
X
L
1
2
3
4
5
6
7
X
H
H
X
X
X
J
L
L
PLASTIC PACKAGE
SOIC PACKAGE
CASE 751A–03
K
X
H
H
X
X
X
L
L
CASE 646–06
14
13
12
10
11
8
N SUFFIX
D SUFFIX
9
Plastic
SOIC
No Change
No Change
No Change
No Change
Outputs
Q
H
J1
Q1
Q1
GND
K2
Q2
Q2
L
L
Toggle
Q
H
H
L
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MC74HC73D Summary of contents
Page 1
MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual J-K Flip-Flop with Reset High–Performance Silicon–Gate CMOS The MC74HC73 is identical in pinout to the LS73. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. Each ...
Page 2
MC74HC73 Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î ...
Page 3
Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î ...
Page 4
MC74HC73 90% 90% 50% CLOCK 10 1/f max t PLH t PHL 90 50% 10% t TLH t THL Figure 1. VALID CLOCK 50% ...
Page 5
SEATING PLANE –A– –B– SEATING PLANE 0.25 (0.010 Motorola reserves the right to make changes without further notice ...