CPLL66-4160 CRYSTEKMICROWAVE [CRYSTEK CORPORATION], CPLL66-4160 Datasheet

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CPLL66-4160

Manufacturer Part Number
CPLL66-4160
Description
PLL/Synthesizer needing only an external frequency reference and supply voltages for the internal PLL (phase lock loop) and VCO
Manufacturer
CRYSTEKMICROWAVE [CRYSTEK CORPORATION]
Datasheet

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Part Number
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Part Number:
CPLL66-4160-4380
Manufacturer:
Crystek
Quantity:
10
The CPLL66 is a complete PLL/Synthesizer needing only an external frequency reference and supply
voltages for the internal PLL (phase lock loop) and VCO (voltage controlled oscillator). The Crystek
CPLL66 is programmed using a standard three line interface (Data, Clock and Load Enable).
The newly introduced CPLL66 family has been initially released to cover 1GHz to 5GHz in bands. It is
housed in a compact 0.6-in. x 0.6-in. x 0.15-in. SMD package which saves board space. Typical phase
noise at 4GHz is -90dBc/Hz at 10KHz offset with 0dBm minimum output power.
Rev. B
Features
Applications
Digital Radio Equipment
Fixed Wireless Access
Satellite Communications Systems
Base Stations
Personal Communications Systems
Portable Radios
Test Instruments
Wireless Infrastructure
1GHz-5GHz Range
Standard 3 Wire Interface
Small layout 0.6" x 0.6"
CPLL66-4160-4380
0.60" SQ SMD
Page 1 of 6

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CPLL66-4160 Summary of contents

Page 1

... The newly introduced CPLL66 family has been initially released to cover 1GHz to 5GHz in bands housed in a compact 0.6-in. x 0.6-in. x 0.15-in. SMD package which saves board space. Typical phase noise at 4GHz is -90dBc/Hz at 10KHz offset with 0dBm minimum output power. Rev. B CPLL66-4160-4380 0.60" SQ SMD Features 1GHz-5GHz Range Standard 3 Wire Interface Small layout 0.6" ...

Page 2

... I2=PLL Input Current Spurious Suppression PFDSpur Reference Feedthru Harmonic Suppression (2nd Harmonic): 2nd 3rd Reference Frequency RF Output Level Input Impedance Rf Output Impedance Operating Temperature Range: Output Phase Noise: CPLL66-4160-4380 0.60" SQ SMD MIN TYP MAX UNITS 4.160 4.380 GHz 2500 KHz 1 msec ...

Page 3

... RECOMMENDED REFLOW SOLDERING PROFILE Ramp-Up 3°C/Sec Max. 260°C 217°C 200°C 150°C Preheat 180 Secs. Max. 8 Minutes Max. CPLL66-4160-4380 0.60" SQ SMD BOTTOM VIEW LE= Load Enable, CMOS Input GND LE DATA= Serial Data Input REF DATA CLK= Serial Data Input ...

Page 4

... Data Latch Counter Counter (A and Function Latch (Including Prescaler Initialization Latch Table II shows the details of the four 24 bit registers. CPLL66-4160-4380 0.60" SQ SMD Conditions MIL-STD-883, Method 2002 MIL-STD-883, Method 2007 MIL-STD-883, Method 1014 MIL-STD-883, Method 2016 Page ...

Page 5

... TC3 TC2 TC1 F5 INITIALIZATION LATCH TIMER COUNTER CONTROL 1 DB16 DB15 DB14 DB13 DB12 DB11 DB10 CP12 CP11 TC4 TC3 TC2 TC1 F5 CPLL66-4160-4380 0.60" SQ SMD DB9 DB8 DB7 DB6 DB5 DB4 DB3 6-BIT A COUNTER DB9 DB8 DB7 DB6 DB5 ...

Page 6

... The following is specific programming for CPLL66-4160-4380 (4.160GHz~4.380GHz with 2500KHz Step Size and 10MHz input reference frequency). Program all three registers with the following: Function Latch: 9F8083 H N Counter Latch: 003401 H R Counter Latch: 000010 H The above values will set the CPLL66-4160-4380 to 4.160GHz CPLL66-4160-4380 0.60" SQ SMD Page ...

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