CY7C68300 CYPRESS [Cypress Semiconductor], CY7C68300 Datasheet - Page 12

• Manufacturer Part Number: CY7C68300
• Manufacturer: CYPRESS [Cypress Semiconductor]

Table 5-2. Example CfgCB (continued)
5.1.2
The mfg_load and mfg_read vendor-specific commands will be passed down through the bulk pipe in the CBWCB portion of the
CBW. The format of this MFGCB is shown below. Byte 0 is a vendor-specific command designator whose value is configurable
and set in the configuration data. Byte 1 must be 0x27 to identify MfgCB. Byte 2–15 are reserved and must be set to zero.
The data transfer length will be determined by the CBW Data Transfer Length specified in bytes 8 through 11 (dCBWDataTrans-
ferLength) of the CBW. The type/direction of the command is determined by the direction bit specified in byte 12, bit 7 (bmCBW-
Flags) of the CBW.
Table 5-3. Example MfgCB
5.1.2.1 Mfg_load
During a mfg_load, the EZ-USB AT2 goes into Manufacturing Test Mode. Manufacturing Test Mode is provided as a means to
implement board or system level interconnect tests. During Manufacturing Test Mode operation, all outputs not directly associated
with USB operation are controllable. Normal control of the output pins are disabled. Control of the select EZ-USB AT2 IO pins
and their three-state controls are mapped to the ATAPI data packet associated with this request. (See the following table for
explanation of the required mfg_load data format.) This requires a write of seven bytes. To exit Manufacturing Test Mode, a hard
reset (#RESET) is required.
Table 5-4. Mfg_load Data Format
Document #: 38-08011 Rev. *B
1 bVSCBSubCommand (must be 0x26)
2 Reserved (must be set to zero)
3 Data Source (must be set to 0x02)
4 Start Address (LSB) (must be set to zero)
5 Start Address (MSB) (must be set to zero)
6–15 Reserved (must be set to zero)
0 bVSCBSignature (set in configuration bytes)
1 bVSCBSubCommand (hardcoded 0x27)
2–15 Reserved (must be zero)
Byte
0
0
0
0
0
1
1
1
1
1
2
3
4
5
6
MfgCB
CfgCB Byte Descriptions
MfgCB Byte Description
Bit(s)
3:1
5:4
3:6
7:0
7:0
7:0
7:0
7:0
0
6
7
0
1
2
7
Reserved
DA[2:0]
CS#[1:0]
Reserved
ARESET#
NDIOW
NDIOR
NDMACK
Reserved
DD[15:0] Three-state (0 = three-state DD pins, 1 = enable DD pins).
DD[7:0]
DD[15:8]
Reserved
Reserved
Reserved
Test/Three-state Control Function
0
0
0
7
0
0
0
0
0
0
6
0
0
0
0
0
0
0
0
0
5
1
0
0
0
0
0
1
1
0
0
0
0
4
0
0
0
0
0
0
Bits
Bits
0
0
0
3
0
0
0
0
0
0
2
1
0
0
0
0
0
1
1
0
CY7C68300
0
1
0
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1
1
0
1
0
0
0
0
1
0
0
0
0
0
0
0
0