HD74LV2GT125AUSE RENESAS [Renesas Technology Corp], HD74LV2GT125AUSE Datasheet

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HD74LV2GT125AUSE

Manufacturer Part Number
HD74LV2GT125AUSE
Description
Dual Bus Buffer with 3-state Output / CMOS Logic Level Shifter
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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Part Number:
HD74LV2GT125AUSE
Manufacturer:
RENESAS
Quantity:
6 000
HD74LV2GT125A
Dual Bus Buffer with 3–state Output /
CMOS Logic Level Shifter
Description
The HD74LV2GT125A has dual bus buffer with 3–state output in an 8 pin package. Output is disabled
when the associated output enable (OE) input is high. To ensure the high impedance state during power up
or power down, OE should be connected to V
resistor is determined by the current sinking capability of the driver. The input protection circuitry on this
device allows over voltage tolerance on the input, allowing the device to be used as a logic–level translator
from 3.0 V CMOS Logic to 5.0 V CMOS Logic or from 1.8 V CMOS logic to 3.0 V CMOS Logic while
operating at the high-voltage power supply. Low voltage and high-speed operation is suitable for the
battery powered products (e.g., notebook computers), and the low power consumption extends the battery
life.
Features
Part Name
HD74LV2GT125AUSE
Rev.2.00, Oct.23.2003, page 1 of 1
The basic gate function is lined up as Renesas uni logic series.
Supplied on emboss taping for high-speed automatic mounting.
TTL compatible input level.
Supply voltage range : 3.0 to 5.5 V
Operating temperature range : –40 to +85°C
Logic-level translate function
3.0 V CMOS logic
1.8 V or 2.5 V CMOS logic
All inputs V
All outputs V
Output current ±6 mA (@V
All the logical input has hysteresis voltage for the slow transition.
Ordering Information
IH
O
(Max.) = 5.5 V (@V
(Max.) = 5.5 V (@V
Package Type
SSOP-8 pin
5.0 V CMOS logic (@V
CC
= 3.0 V to 3.6 V), ±12 mA (@V
3.3 V CMOS logic (@V
CC
CC
= 0 V to 5.5 V)
= 0 V, Output : Z)
Package Code
TTP-8DBV
CC
through a pull-up resistor; the minimum value of the
CC
= 5.0 V)
CC
= 3.3 V)
Package
Abbreviation
US
CC
= 4.5 V to 5.5 V)
(Previous ADE-205-676A (Z))
Taping Abbreviation
(Quantity)
E (3,000 pcs/reel)
REJ03D0148–0200Z
Oct.23.2003
Rev.2.00

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HD74LV2GT125AUSE Summary of contents

Page 1

... Output current ±6 mA (@ 3.6 V), ±12 mA (@V CC All the logical input has hysteresis voltage for the slow transition. Ordering Information Part Name Package Type HD74LV2GT125AUSE SSOP-8 pin Rev.2.00, Oct.23.2003, page through a pull-up resistor; the minimum value of the ...

Page 2

HD74LV2GT125A Outline and Article Indication • HD74LV2GT125A SSOP-8 Function Table Inputs High level L : Low level X : Immaterial Z : High impedance Rev.2.00, Oct.23.2003, page ...

Page 3

HD74LV2GT125A Pin Arrangement OE1 A1 Y2 GND Absolute Maximum Ratings Item Symbol Supply voltage range Input voltage range V I *1, 2 Output voltage range V O Input clamp current I IK Output clamp current I OK ...

Page 4

HD74LV2GT125A Recommended Operating Conditions Item Symbol Supply voltage V CC Input voltage V IN Output voltage V OUT Operating temperature T opr Input rise / fall time Electrical Characteristics Ta = –40 to 85°C Item ...

Page 5

HD74LV2GT125A Switching Characteristics V = 3.3 ± 0 25°C Item Symbol Min Typ Propagation t — 4.5 PLH delay time t PHL — 6.0 Enable time t — 4 — 6.0 Disable time ...

Page 6

HD74LV2GT125A Test Circuit V CC Input Pulse Generator OUT Note includes probe and jig capacitance. L Rev.2.00, Oct.23.2003, page Output TEST ...

Page 7

HD74LV2GT125A • Waveforms – Input A Vref 10 % Output Y • Waveforms – Input OE Vref 10 % Waveform – A Waveform – B Notes: 1. Input waveform : PRR 2. Waveform – ...

Page 8

HD74LV2GT125A Package Dimensions 2.0 1.5 (0.5) (0.5) + 0.1 8 0.2 0.05 Rev.2.00, Oct.23.2003, page 0.2 0.2 (0.5) Package Code JEDEC JEITA Mass (reference value) Unit: mm TTP–8DBV 0.010 g ...

Page 9

Sales Strategic Planning Div. Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble ...

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