AD8302_02 AD [Analog Devices], AD8302_02 Datasheet - Page 21

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AD8302_02

Manufacturer Part Number
AD8302_02
Description
LF-2.7 GHz RF/IF Gain and Phase Detector
Manufacturer
AD [Analog Devices]
Datasheet
Component
P1
R1, R2
R3
R5, R6, R9
C3, C7, R4
C1, C5
C2, C8
C4, C6
SW1
SW2
REV. A
INPA
INPB
GND
Figure 15a. Component Side Metal of Evaluation Board
VP
R1
R2
VP
Figure 14. Evaluation Board Schematic
C1
C4
C6
C5
C7
C3
Function
Power Supply and Ground Connector: Pin 2 VPOS and Pins 1 and 3 Ground.
Input Termination. Provide termination for input sources.
VREF Output Load. This load is optional and is meant to allow the user to simulate
their circuit loading of the device.
Snubbing Resistor
Supply Decoupling
Input AC-Coupling Capacitors
Video Filtering. C2 and C8 limit the video bandwidth of the gain and phase
output respectively.
Offset Feedback. These set the high-pass corner of the offset cancellation loop
and thus with the input ac-coupling capacitors the minimum operating frequency.
GSET Signal Source. When SW1 is in the position shown, the device is in gain
measure mode; when switched, it operates in comparator mode and a signal
must be applied to GSET.
PSET Signal Source. When SW2 is in the position shown, the device is in phase
measure mode; when switched, it operates in comparator mode and a signal
must be applied to PSET.
R4
1
2
3
4
5
6
7
COMM
INPA
OFSA
VPOS
OFSB
INPB
COMM
AD8302
VMAG
MSET
MFLT
VREF
VPHS
PSET
PFLT
14
13
12
11
10
9
8
Table III. Evaluation Board Configuration Options
R8
C8
R7
SW2
C2
R3
R6
R5
SW1
R9
GAIN
VREF
PSET
PHASE
–21–
GSET
Figure 15b. Component Side Silkscreen of Evaluation Board
Table II. P1 Pin Allocations
1
2
3
Common
VPOS
Common
C2 = C8 = Open (Size 0603)
Default Condition
Not Applicable
R1 = R2 = 52.3 Ω (Size 0402)
R3 = 1 kΩ (Size 0603)
R5 = R6 = 0 Ω (Size 0603)
R9 = 0 Ω (Size 0603)
C3 = 100 pF (Size 0603)
C7 = 0.1 µF (Size 0603)
R4 = 0 Ω (Size 0603)
C1 = C5 = 1 nF (Size 0603)
C4 = C6 = 1 nF (Size 0603)
SW1 = Installed
SW1 = Installed
AD8302

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