HD74LV2GT74AUSE RENESAS [Renesas Technology Corp], HD74LV2GT74AUSE Datasheet

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HD74LV2GT74AUSE

Manufacturer Part Number
HD74LV2GT74AUSE
Description
Single D-type Flip Flops with Preset and Clear / CMOS Logic Level Shifter
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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Part Number
Manufacturer
Quantity
Price
Part Number:
HD74LV2GT74AUSE-E
Manufacturer:
RENESAS
Quantity:
8 000
HD74LV2GT74A
Single D–type Flip Flops with Preset and Clear /
CMOS Logic Level Shifter
Description
The HD74LV2GT74A has independent data, preset, clear, and clock inputs Q and Q outputs in an 8 pin
package. The input data is transferred to the output at the rising edge of clock pulse CLK. The input
protection circuitry on this device allows over voltage tolerance on the input, allowing the device to be used
as a logic–level translator from 3.0 V CMOS Logic to 5.0 V CMOS Logic or from 1.8 V CMOS logic to
3.0 V CMOS Logic while operating at the high-voltage power supply. Low voltage and high-speed
operation is suitable for the battery powered products (e.g., notebook computers), and the low power
consumption extends the battery life.
Features
Part Name
HD74LV2GT74AUSE SSOP-8 pin
Rev.2.00, Oct.17.2003, page 1 of 1
The basic gate function is lined up as Renesas uni logic series.
Supplied on emboss taping for high-speed automatic mounting.
TTL compatible input level.
Supply voltage range : 3.0 to 5.5 V
Operating temperature range : –40 to +85°C
Logic-level translate function
3.0 V CMOS logic
1.8 V or 2.5 V CMOS logic
All inputs V
All outputs V
Output current ±6 mA (@V
All the logical input has hysteresis voltage for the slow transition.
Ordering Information
IH
O
(Max.) = 5.5 V (@V
(Max.) = 5.5 V (@V
Package Type
5.0 V CMOS logic (@V
CC
= 3.0 V to 3.6 V), ±12 mA (@V
3.3 V CMOS logic (@V
CC
CC
= 0 V to 5.5 V)
= 0 V)
Package Code
TTP-8DBV
CC
= 5.0 V)
CC
= 3.3 V)
Package
Abbreviation
US
CC
= 4.5 V to 5.5 V)
(Previous ADE-205-681A (Z))
Taping Abbreviation
(Quantity)
E (3,000 pcs/reel)
REJ03D0146–0200Z
Oct.17.2003
Rev.2.00

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