PCF2114AU/10 PHILIPS [NXP Semiconductors], PCF2114AU/10 Datasheet - Page 8

• Manufacturer Part Number: PCF2114AU/10
• Description: LCD controller/drivers
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
8.2
In the PCF2116K version, V
on-chip resistor (R
value of 1 M and draws a typical current of 4 A from the
pin V
present across R
The voltage range of the PCF2116K is between V
V
generator is switched off and an external voltage must be
supplied to pin V
When G = logic 1 the generator produces a negative
voltage at pin V
pin V
relationship:
Where:
When G = logic 0, the generated output voltage V
equal to V
8.3
The standard character sets A, C and G are available for
the PCF2114x and PCF2116x. Standard character set C is
available for the PCF2116K.
8.4
The intermediate bias voltages for the LCD display are
also generated on-chip. This removes the need for an
external resistive bias chain and significantly reduces the
system power consumption. The optimum levels depend
on the multiplex rate and are selected automatically when
the number of lines in the display is defined.
The optimum value of V
the LCD threshold voltage (V
levels and is given by the relationships in Table 1.Using a
5-level bias scheme for 1 : 16 MUX rate allows V
for most LCD liquids. The effect on the display contrast is
negligible.
Table 1 Optimum values for V
1997 Apr 07
DD
V
V
V
V
LCD controller/drivers
OP
OP
LCD
OP
0
0
. A constant voltage (equal to 1.34V
. The LCD operating voltage is given by the
0.5 V (see Fig.4). When V
= 2.34V
= V
= V
LCD supply voltage generator, PCF2116K
Character generator ROM (CGROM)
LCD bias voltage generator
= V
MUX RATE
0
DD
DD
0
(between V
1 : 16
1 : 32
DD
(1.34V
V
V
LCD
LCD
LCD
0
0
.
0
, controlled by the input voltage at
) to V
V
. This may be more negative than V
0
DD
SS
)
OP
LCD
and V
depends on the multiplex rate,
0
. Resistor R
th
is connected through an
) and the number of bias
OP
DD
0
is connected to V
). In this instance:
NUMBER OF BIAS
0
LEVELS
has a nominal
DD
5
6
) is always
OP
LCD
SS
DD
< 5 V
and
is
the
SS
.
8
8.5
The on-chip oscillator provides the clock signal for the
display system. No external components are required.
Pin OSC must be connected to V
8.6
If an external clock is to be used, it must be input at
pin OSC. The resulting display frame frequency is given by
f
otherwise the LCD may be frozen in a DC state.
8.7
The power-on reset block initializes the chip after
power-on or power failure.
8.8
The PCF2116 has two 8-bit registers, an Instruction
Register (IR) and a Data Register (DR). The Register
Select signal (RS) determines which register will be
accessed.
The instruction register stores instruction codes such as
‘Display clear’ and ‘Cursor shift’, and address information
for the Display Data RAM (DDRAM) and Character
Generator RAM (CGRAM). The instruction register can be
written to, but not read, by the system controller.
The data register temporarily stores data to be read from
the DDRAM and CGRAM. When reading, data from the
DDRAM or CGRAM corresponding to the address in the
Address Counter is written to the data register prior to
being read by the ‘Read data’ instruction.
8.9
The Busy Flag indicates the free/busy status of the
PCF2116. Logic 1 indicates that the chip is busy and
further instructions will not be accepted. The Busy Flag is
output to pin DB7 when RS = logic 0 and R/W = logic 1.
Instructions should only be written after checking that the
Busy Flag is logic 0 or waiting for the required number of
clock cycles.
frame
=
Oscillator
External clock
Power-on reset
Registers
Busy Flag
1
2304
V
OP
3.67
5.19
f
/V
osc
th
. A clock signal must always be present,
PCF2116 family
DD
DISCRIMINATION
.
Product specification
V
1.277
1.196
on
/V
off