PCF8533U PHILIPS [NXP Semiconductors], PCF8533U Datasheet - Page 14

no-image

PCF8533U

Manufacturer Part Number
PCF8533U
Description
Universal LCD driver for low multiplex rates
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PCF8533U/2/F2
Manufacturer:
NXP
Quantity:
50 000
Part Number:
PCF8533U/2/F2
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Part Number:
PCF8533U/2/F2
0
Part Number:
PCF8533U/2/F2,026
Manufacturer:
NXP
Quantity:
12 000
Part Number:
PCF8533U/2/F2,026
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Part Number:
PCF8533U/2/F2.026
Manufacturer:
NXP
Quantity:
10 800
handbook, full pagewidth
Philips Semiconductors
When display data is transmitted to the PCF8533 the
display bytes received are stored in the display RAM in
accordance with the selected LCD drive mode. The data is
stored as it arrives and does not wait for the acknowledge
cycle as with the commands. Depending on the current
mux mode data is stored singularly, in pairs, triplets or
quadruplets. e.g. in 1 : 2 mux mode the RAM data is stored
every second bit. To illustrate the filling order, an example
of a 7-segment numeric display showing all drive modes is
given in Fig.9; the RAM filling organization depicted
applies equally to other LCD types. With reference to
Fig.9, in the static drive mode the eight transmitted data
bits are placed in bit 0 of eight successive display RAM
addresses. In the 1 : 2 multiplex drive mode the eight
transmitted data bits are placed in bits 0 and 1 of four
successive display RAM addresses.
1999 Jul 30
Universal LCD driver for low multiplex rates
Fig.8
Display RAM bit map showing direct relationship between display RAM addresses and segment outputs,
and between bits in a RAM word and backplane outputs.
backplane outputs
display RAM bits
(columns) /
(BP)
0
1
2
3
0
1
2
display RAM addresses (rows) / segment outputs (S)
3
4
14
In the 1 : 3 multiplex drive mode these bits are placed in
bits 0, 1 and 2 of three successive addresses, with bit 2 of
the third address left unchanged. This last bit may, if
necessary, be controlled by an additional transfer to this
address but care should be taken to avoid overriding
adjacent data because full bytes are always transmitted.
In the 1 : 4 multiplex drive mode the eight transmitted data
bits are placed in bits 0, 1, 2 and 3 of two successive
display RAM addresses.
Table 3 LCD frame frequencies
FRAME FREQUENCY
f
---------- -
CLK
24
75
76
77
78
MGL750
NOMINAL FRAME
FREQUENCY (Hz)
79
Product specification
PCF8533
64

Related parts for PCF8533U