PCF8570P PHILIPS [NXP Semiconductors], PCF8570P Datasheet - Page 5
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PCF8570P
Manufacturer Part Number
PCF8570P
Description
256 x 8-bit static low-voltage RAM with I2C-bus interface
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet
1.PCF8570P.pdf
(20 pages)
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8
The I
between different ICs or modules. The two lines are a
serial data line (SDA) and a serial clock line (SCL). Both
lines must be connected to a positive supply via a pull-up
resistor. Data transfer may be initiated only when the bus
is not busy.
8.2
Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW transition of the data line, while the
clock is HIGH is defined as the start condition (S). A LOW-to-HIGH transition of the data line while the clock is HIGH is
defined as the stop condition (P).
1999 Jan 06
256
I
2
CHARACTERISTICS OF THE I
C-bus interface
2
C-bus is for bidirectional, two-line communication
Start and stop conditions
8-bit static low-voltage RAM with
SDA
SCL
START condition
SDA
SCL
S
2
C-BUS
Fig.4 Definition of start and stop conditions.
data valid
data line
stable;
Fig.3 Bit transfer.
5
allowed
change
of data
8.1
One data bit is transferred during each clock pulse.
The data on the SDA line must remain stable during the
HIGH period of the clock pulse as changes in the data line
at this time will be interpreted as a control signal.
Bit transfer
STOP condition
MBA607
P
MBA608
SDA
SCL
Product specification
PCF8570