M41T00AUDD1E STMICROELECTRONICS [STMicroelectronics], M41T00AUDD1E Datasheet - Page 17

• Manufacturer Part Number: M41T00AUDD1E
• Description: Serial real-time clock with audio
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

5.1.1
5.1.2
5.1.3
Register 08 is the calibration register. Calibration is described in detail in the Clock
calibration section. Bit D7 is the OUT bit and controls the discrete output pin IRQ/FT/OUT as
described in
Halt bit operation
Bit D7 of register 09 h is the HT or halt bit. Whenever the device switches to backup power,
it sets the HT bit to 1 and stores the time of power down in the transfer buffer registers. This
is known as power-down time stamp. During normal timekeeping, once per second, the
transfer buffer registers are updated with the current time. When HT is 1, that updating is
halted. The clock continues to keep time but the periodic updates do not occur.
Upon power up, reads of the clock registers will return the time of power down (assuming
adequate backup power was maintained while V
by writing it to 0, subsequent reads of the clock registers will return the current time.
At power up, the user can read the time of power down, and then clear the HT bit to allow
updates. The next read will return the current time. Knowing both the power up time and the
power down time allows the user to calculate the duration of power off.
In addition to the HT bit getting set to 1 automatically at power down, the user can also write
it to 1 to halt updating of the registers.
Oscillator fail detect operation
Bits D5 and D4 of register 09 h contain the oscillator fail flag (OF) and the oscillator fail
interrupt enable bit (OFIE). If the 32 KHz oscillator drops four or more pulses in a row, as
might occur during an extended outage while backed up on a capacitor, the OF bit will be
set to 1. This provides an indication to the user of the integrity of the timekeeping operation.
Whenever the OF bit is a 1, the system should consider the time to be possibly corrupted
due to operating at too low a voltage. The OF bit will always be 1 at the initial power up of
the device. The OF bit is cleared by writing it to 0. At the initial power up, users should wait
three seconds for the oscillator to stabilize before clearing the OF bit.
OFIE can be used to enable the device to assert its interrupt output whenever an oscillator
failure is detected. The oscillator fail interrupt will drive the IRQ/FT/OUT pin as described in
Table 5. The interrupt is cleared by writing the OF bit to 0. Setting OFIE enables the
oscillator fail interrupt. Clearing it to 0 disables it, but the OF will continue to function
regardless of OFIE.
Trickle charger
Bits D6 and D3 to D0, of register 09h, control the trickle charge function. It is described in
detail in the Trickle Charge Circuit section.
Table
5.
CC
was off). After the user clears the HT bit
17/44