M41T00_08 STMICROELECTRONICS [STMicroelectronics], M41T00_08 Datasheet
M41T00_08
Related parts for M41T00_08
M41T00_08 Summary of contents
Page 1
Features ■ For new designs use M41T00S ■ Counters for seconds, minutes, hours, day, month, years, and century ■ 32 kHz crystal oscillator integrating load capacitance (12.5 pF) providing exceptional oscillator stability and high crystal series resistance operation 2 ■ ...
Page 2
Contents 1 Device overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
Page 3
List of tables Table 1. Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
Page 4
List of figures Figure 1. Logic symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
Page 5
Device overview Figure 1. Logic symbol Figure 2. SOIC connection Table 1. Pin description Symbol OSCI OSCO FT/OUT SCL SDA V BAT BAT OSCI M41T00 SCL V SS M41T00 OSCI 1 8 ...
Page 6
Figure 3. Block diagram OSCI OSCILLATOR 32.768 kHz OSCO FT/OUT V CC VOLTAGE SENSE and V SS SWITCH V BAT CIRCUITRY SCL SERIAL BUS INTERFACE SDA 6/ SECONDS DIVIDER MINUTES CENTURY/HOURS CONTROL LOGIC MONTH ADDRESS REGISTER CONTROL DAY ...
Page 7
Device operation The M41T00 clock operates as a slave device on the serial bus. Access is obtained by implementing a start condition followed by the correct slave address (D0h). The 8 bytes contained in the device can then be ...
Page 8
Stop data transfer A change in the state of the data line, from low to high, while the clock is high, defines the STOP condition. 2.5 Data valid The state of the data line represents valid data when after ...
Page 9
Figure 4. Serial bus data transfer sequence CLOCK DATA START CONDITION Figure 5. Acknowledge sequences START SCLK FROM 1 MASTER DATA OUTPUT MSB BY TRANSMITTER DATA OUTPUT BY RECEIVER Figure 6. Bus timing requirements sequence SDA tBUF tHD:STA tR SCL ...
Page 10
Characteristics Table 2. AC characteristics Symbol f SCL clock frequency SCL t Clock low period LOW t Clock high period HIGH t SDA and SCL rise time R t SDA and SCL fall time F START condition hold time ...
Page 11
Figure 7. Slave address location START Figure 8. READ mode sequence BUS ACTIVITY: MASTER SDA LINE S BUS ACTIVITY: SLAVE ADDRESS DATA n+X Figure 9. Alternate READ mode sequence BUS ACTIVITY: MASTER SDA LINE S BUS ACTIVITY: SLAVE ADDRESS R/W ...
Page 12
WRITE mode In this mode the master transmitter transmits to the M41T00 slave receiver. Bus protocol is shown in Figure 10. Following the START condition and slave address, a logic '0' (R placed on the bus ...
Page 13
Table 4. RTC power down/up trip points dc characteristics Symbol Parameter (4) Backup switchover voltage Valid for ambient operating temperature: T noted). 2. All voltages referenced 3.3 V application, if initial ...
Page 14
M41T00 clock operation The eight byte clock register (see and time from the clock binary coded decimal format. Seconds, minutes, and hours are contained within the first three registers. Bits D6 and D7 of clock register 2 ...
Page 15
Table 5. Register map Address (2) CEB OUT 1. Keys sign bit FT = frequency test bit ST = stop bit OUT = output ...
Page 16
Therefore, each calibration step has the effect of adding 512 or subtracting 256 oscillator cycles for every 125,829,120 actual oscillator cycles, that is +4.068 or –2.034 ppm of adjustment per calibration step in the calibration register. Assuming that the oscillator ...
Page 17
Figure 13. Clock calibration NORMAL POSITIVE CALIBRATION NEGATIVE CALIBRATION 3.2 Output driver pin When the FT bit is not set, the FT/OUT pin becomes an output driver that reflects the contents the control register. In other words, ...
Page 18
Maximum ratings Stressing the device above the rating listed in the "Absolute maximum ratings" table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above ...
Page 19
DC and AC parameters This section summarizes the operating and measurement conditions, as well as the dc and ac characteristics of the device. The parameters in the following DC and AC characteristic tables are derived from tests performed under ...
Page 20
Table 9. DC characteristics Symbol Parameter I Input leakage current LI I Output leakage current LO I Supply current CC1 I RTC supply current (standby) CC2 V Input low voltage IL V Input high voltage IH V Output low voltage ...
Page 21
Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the ...
Page 22
Figure 15. SO8 – 8-lead plastic small outline, 150 mils body width, package mechanical data Drawing is not to scale. Table 11. SO8 – 8-lead plastic small outline, 150 mils body width, ...
Page 23
Part numbering Table 12. Ordering information scheme Example: Device type M41T Supply voltage and WRITE protect voltage 2 Package M = SO8 (150 mils width) Temperature range 6 = –40 to ...
Page 24
Revision history Table 13. Revision history Date Revision Mar-1999 15-May-2000 25-Jul-2000 12-Dec-2000 24-Jan-2001 27-Feb-2001 17-Jul-2001 27-Nov-2001 21-Jan-2002 13-May-2002 05-Jun-2002 03-Jul-2002 07-Nov-2002 15-Jun-04 28-Jun-2004 08-Dec-2006 22-Dec-2006 15-May-2008 24/25 1.0 First Issue 1.1 AC Characteristic conditions changed 1.2 Crystal Electrical Characteristics: ...
Page 25
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any ...