M41ST87WMX6F STMICROELECTRONICS [STMicroelectronics], M41ST87WMX6F Datasheet - Page 40

• Manufacturer Part Number: M41ST87WMX6F
• Description: 5.0 V and 3.3/3.0 V secure serial RTC and NVRAM supervisor with tamper detection and 128 bytes of clearable NVRAM
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

Clock operation
3.14
3.15
3.16
Note:
40/52
The M41ST87Y/W only monitors the battery when a nominal V
Thus applications which require extensive durations in the battery back-up mode should be
powered-up periodically (at least once every few months) in order for this technique to be
beneficial. Additionally, if a battery low is indicated, data integrity should be verified upon
power-up via a checksum or other technique.
t
Bit D7 of clock register 04h contains the t
of the deselect time after V
WRITEs may again be performed to the device after a power-down condition. The t
allow the user to set the length of this deselect time as defined by
Table 12.
1. Default setting.
Electronic serial number
The M41ST87Y/W has a unique 8-byte lasered serial number with parity. This serial number
is “read only” and is generated such that no two devices will contain an identical number.
Oscillator stop detection
If the oscillator fail (OF) bit is internally set to a '1,' this indicates that the oscillator has either
stopped, or was stopped for some period of time, and can be used to judge the validity of the
clock and date data. This bit will be set to '1' any time the oscillator stops. The following
conditions can cause the OF bit to be set:
●
●
●
If the oscillator fail interrupt enable bit (OFIE) is set to a '1,' the IRQ/OUT pin will also be
asserted. The IRQ/OUT output is cleared by resetting the OF bit to '0,' resetting the OFIE bit
to '0,' or if the RST output is asserted (but is NOT cleared by reading the flag register).
The OF bit will remain set to '1' until written to logic '0.' The oscillator must start and have
run for at least 4 seconds before attempting to reset the OF bit to '0.' This function operates
both under normal power and in battery backup. If the trigger event occurs during a power-
down condition, this bit will be set correctly.
The ABE bit must be set to '1' for the IRQ/OUT pin to be activated in battery backup.
rec
The first time power is applied (defaults to a '1' on power-up).
The voltage present on V
The ST bit is set to '1.'
bit
t
rec
bit (TR)
0
0
1
t
rec
definitions
CC
STOP bit (ST)
CC
reaches V
Doc ID 9497 Rev 8
or battery is insufficient to support oscillation.
X
0
1
PFD
rec
bit (TR). t
. This allows for a voltage settling time before
rec
Min
96
40
50
refers to the automatic continuation
t
rec
CC
time
is applied to the device.
Table
M41ST87Y, M41ST87W
2000
98
Max
200
12.
(1)
rec
Units
bit will
ms
ms
µs