M41T56_11 STMICROELECTRONICS [STMicroelectronics], M41T56_11 Datasheet - Page 14

• Manufacturer Part Number: M41T56_11
• Description: Serial real-time clock (RTC) with 56 bytes NVRAM
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

Clock operation
3.1
Note:
14/27
Clock calibration
The M41T56 is driven by a quartz-controlled oscillator with a nominal frequency of
32,768 Hz. The devices are tested not to exceed 35 ppm (parts per million) oscillator
frequency error at 25 °C, which equates to about ±1.53 minutes per month. With the
calibration bits properly set, the accuracy of each M41T56 improves to better than ±2 ppm
at 25 °C.
The oscillation rate of any crystal changes with temperature (see
Most clock chips compensate for crystal frequency and temperature shift error with
cumbersome “trim” capacitors. The M41T56 design, however, employs periodic counter
correction. The calibration circuit adds or subtracts counts from the oscillator divider circuit
at the divide by 256 stage, as shown in
are blanked (subtracted, negative calibration) or split (added, positive calibration) depends
upon the value loaded into the five-bit calibration byte found in the control register. Adding
counts speeds the clock up, subtracting counts slows the clock down.
The calibration byte occupies the five lower order bits (D4-D0) in the control register (addr
7). This byte can be set to represent any value between 0 and 31 in binary form. Bit D5 is
the sign bit; '1' indicates positive calibration, '0' indicates negative calibration. Calibration
occurs within a 64 minute cycle. The first 62 minutes in the cycle may, once per minute, have
one second either shortened by 128 or lengthened by 256 oscillator cycles. If a binary '1' is
loaded into the register, only the first 2 minutes in the 64 minutes cycle will be modified; if a
binary 6 is loaded, the first 12 will be affected, and so on.
Therefore, each calibration step has the effect of adding 512 or subtracting 256 oscillator
cycles for every 125,829,120 actual oscillator cycles, that is +4.068 or –2.034 ppm of
adjustment per calibration step in the calibration register. Assuming that the oscillator is in
fact running at exactly 32,768Hz, each of the 31 increments in the calibration byte would
represent +10.7 or –5.35 seconds per month which corresponds to a total range of +5.5 or –
2.75 minutes per month.
Two methods are available for ascertaining how much calibration a given M41T56 may
require. The first involves simply setting the clock, letting it run for a month and comparing it
to a known accurate reference (like WWV broadcasts). While that may seem crude, it allows
the designer to give the end user the ability to calibrate his clock as his environment may
require, even after the final product is packaged in a non-user serviceable enclosure. All the
designer has to do is provide a simple utility that accessed the calibration byte.
The second approach is better suited to a manufacturing environment, and involves the use
of some test equipment. When the frequency test (FT) bit, the seventh-most significant bit in
the control register, is set to a '1,' and the oscillator is running at 32,768 Hz, the FT/OUT pin
of the device will toggle at 512 Hz. Any deviation from 512 Hz indicates the degree and
direction of oscillator frequency shift at the test temperature.
For example, a reading of 512.01024 Hz would indicate a +20 ppm oscillator frequency
error, requiring a –10(XX001010) to be loaded into the calibration byte for correction.
Setting or changing the calibration byte does not affect the frequency test output frequency.
Doc ID 6104 Rev 9
Figure 11 on page
15. The number of times pulses
Figure 11 on page
M41T56
15).