M41T60_05 STMICROELECTRONICS [STMicroelectronics], M41T60_05 Datasheet - Page 8

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M41T60_05

Manufacturer Part Number
M41T60_05
Description
Serial access real-time clock
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
Operation
2.3
8/24
WRITE mode
In this mode the master transmitter transmits to the M41T60 slave receiver. Bus protocol is
shown in
(R/W = 0) is placed on the bus and indicates to the addressed device that word address An
will follow and is to be written to the on-chip address pointer. The data word to be written to
the memory is strobed in next and the internal address pointer is increased to the next
address location on the reception of an acknowledge clock. The M41T60 slave receiver will
send an acknowledge clock to the master transmitter after it has received the slave address
and again after it has received the word address and each data byte.
Figure 7.
Figure 8.
BUS ACTIVITY:
MASTER
SDA LINE
BUS ACTIVITY:
Figure 10 on page
Slave address location
READ mode sequence
S
ADDRESS
SLAVE
START
DATA n+X
9. Following the START condition and slave address, a logic '0'
ADDRESS (An)
WORD
P
1
1
SLAVE ADDRESS
S
0
ADDRESS
1
SLAVE
0
0
0
R/W
DATA n
A
AI00602
DATA n+1
AI00899
M41T60

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