CDP6402CD HARRIS [Harris Corporation], CDP6402CD Datasheet - Page 8

• Manufacturer Part Number: CDP6402CD
• Description: CMOS Universal Asynchronous Receiver/Transmitter (UART)
• Manufacturer: HARRIS [Harris Corporation]

† See Table 1 (Control Word Function)
PIN
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
SYMBOL
CLS2†
CLSl†
TBR1
TBR2
TBR3
TBR4
TBR5
TBR6
TBR7
TBR8
SBS†
EPE†
TRO
CRL
TRC
PI†
Character data, start data and stop bits appear serially at the TRANSMITTER REGISTER OUTPUT.
Character data is loaded into the TRANSMITTER BUFFER REGISTER via inputs TBR1-TBR8. For character
formats less than 8 bits, the TBR8, 7, and 6 Inputs are ignored corresponding to the programmed word length.
A high level on CONTROL REGISTER LOAD loads the control register.
A high level on PARITY INHIBIT inhibits parity generation, parity checking and forces PE output low.
A high level on STOP BIT SELECT selects 1.5 stop bits for a 5 character format and 2 stop bits for other
lengths.
These inputs program the CHARACTER LENGTH SELECTED. (CLS1 low CLS2 low 5 bits) (CLS1 high CLS2
low 6 bits) (CLS1 low CLS2 high 7 bits) (CLS1 high CLS2 high 8 bits).
See Pin 37 - CLS2
When PI is low, a high level on EVEN PARITY ENABLE generates and checks even parity. A low level selects
odd parity.
The TRANSMITTER REGISTER CLOCK is 16X the transmit data rate.
See Pin 26 - TBR1
TABLE 2. FUNCTION PIN DEFINITION (Continued)
CDP6402, CDP6402C
5-81
DESCRIPTION