MCP3202-BI/MS MICROCHIP [Microchip Technology], MCP3202-BI/MS Datasheet - Page 15

• Manufacturer Part Number: MCP3202-BI/MS
• Description: 2.7V Dual Channel 12-Bit A/D Converter with SPI Serial Interface
• Manufacturer: MICROCHIP [Microchip Technology]

6.0
6.1
With most microcontroller SPI ports, it is required to
send groups of eight bits. It is also required that the
microcontroller SPI port be configured to clock out data
on the falling edge of clock and latch data in on the ris-
ing edge. Depending on how communication routines
are used, it is very possible that the number of clocks
required for communication will not be a multiple of
eight. Therefore, it may be necessary for the MCU to
send more clocks than are actually required. This is
usually done by sending ‘leading zeros’ before the start
bit, which are ignored by the device. As an example,
Figure 6-1 and Figure 6-2 show how the MCP3202 can
be interfaced to a MCU with a hardware SPI port.
Figure 6-1 depicts the operation shown in SPI Mode
0,0, which requires that the SCLK from the MCU idles
FIGURE 6-1:
FIGURE 6-2:
© 2006 Microchip Technology Inc.
X = Don’t Care Bits
MCU Transmitted Data
X = Don’t Care Bits
SCLK
(Aligned with falling
D
MCU Received Data
MCU Transmitted Data
(Aligned with rising
edge of clock)
MCU Received Data
(Aligned with rising
CS
D
OUT
SCLK
(Aligned with falling
edge of clock)
D
edge of clock)
IN
edge of clock)
CS
D
OUT
IN
APPLICATIONS INFORMATION
Using the MCP3202 with
Microcontroller (MCU) SPI Ports
MCU latches data from A/D Converter
on rising edges of SCLK
MCU latches data from A/D Converter
on rising edges of SCLK
SPI Communication using 8-bit segments (Mode 0,0: SCLK idles low).
SPI Communication using 8-bit segments (Mode 1,1: SCLK idles high).
1
X
0
1
Data stored into MCU receive
register after transmission of
first 8 bits
X
X
2
Data stored into MCU receive
register after transmission of
first 8 bits
X
0
2
X
X
3
X
0
3
X
X
HI-Z
4
0
X
HI-Z
4
X
X
5
0
X
5
X
X
6
0
X
6
X
X
A/D Converter on falling edges
7
Data is clocked out of
0
Data is clocked out of
A/D Converter on falling edges
X
7
Start
X
X
Start
8
Bit
1
Start
X
Bit
Start
1
X
8
SGL/
DIFF
SGL/
DIFF
9
X
SGL/
DIFF
Data stored into MCU receive
register after transmission of
second 8 bits
9
X
ODD/
SIGN
10
Data stored into MCU receive
register after transmission of
second 8 bits
X
10
ODD/
SIGN
X
MSBF
11
X
MSBF
11
NULL
BIT
X
12
(Null)
NULL
BIT
X
0
12
(Null)
B11
X
0
in the ‘low’ state, while Figure 6-2 shows the similar
case of SPI Mode 1,1 where the clock idles in the ‘high’
state.
As shown in Figure 6-1, the first byte transmitted to the
A/D Converter contains seven leading zeros before the
start bit. Arranging the leading zeros this way produces
the output 12 bits to fall in positions easily manipulated
by the MCU. The MSB is clocked out of the A/D Con-
verter on the falling edge of clock number 12. After the
second eight clocks have been sent to the device, the
MCU receive buffer will contain three unknown bits (the
output is at high impedance until the null bit is clocked
out), the null bit and the highest order four bits of the
conversion. After the third byte has been sent to the
device, the receive register will contain the lowest order
eight bits of the conversion results. Easier manipulation
of the converted data can be obtained by using this
method.
13
B11
B11
X
13
B11
X
B10
14
B10
B10
X
14
B10
X
B9
15
B9
X
B9
15
B9
X
B8
16
B8
X
B8
X
B8
16
B7
17
Don’t Care
B7
B7
X
Don’t Care
Data stored into MCU receive
register after transmission of
last 8 bits
17
B7
X
Data stored into MCU receive
register after transmission of
last 8 bits
B6
18
B6
X
B6
18
B6
X
B5
19
X
B5
B5
19
B5
X
B4
20
X
MCP3202
B4
B4
20
B4
X
B3
21
X
B3
B3
21
B3
X
B2
22
DS21034D-page 15
X
B2
B2
22
B2
X
B1
23
B1
X
B1
23
B1
X
B0
24
X
B0
B0
24
B0
X