MCP3301T MICROCHIP [Microchip Technology], MCP3301T Datasheet - Page 18

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MCP3301T

Manufacturer Part Number
MCP3301T
Description
13-Bit Differential Input, Low Power A/D Converter with SPI Serial Interface
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

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MCP3301
FIGURE 5-3:
5.2.1
When the MCP3301 initiates, charge is stored on the
sample capacitor. When the sample period is complete,
the device converts one bit for each clock that is
received. It is important for the user to note that a slow
clock rate will allow charge to bleed off the sample
capacitor while the conversion is taking place. For
MCP3301 devices, the recommended minimum clock
speed during the conversion cycle (t
Failure to meet this criteria may introduce linearity
errors into the conversion outside the rated specifica-
tions. It should be noted that, during the entire conver-
sion cycle, the A/D converter does not have
requirements for clock speed or duty cycle, as long as
all timing specifications are met.
5.3
For pseudo-differential bipolar operation, the biasing
circuit shown in
AC coupled to the converter. This configuration will give
a digital output range of -4096 to +4095. With the 2.5V
reference, the LSB size is equal to 610 µV.
Although the ADC is not production tested with a 2.5V
reference as shown, linearity will not change more than
0.1 LSB. See
DNL errors versus V
between the high-pass corner and the acquisition time.
The value of C will need to be quite large in order to
bring down the high-pass corner. The value of R needs
to be 1 k or less, since higher input impedances
require additional acquisition time.
DS21700D-page 18
Legend
VA
I
C
LEAKAGE
SAMPLE
Biasing Solutions
R
C
CHx
R
S
PIN
SS
VA
R
MAINTAINING MINIMUM CLOCK
SPEED
V
SS
S
T
Figure 2-2
CHx
Figure 5-4
=
=
=
=
=
=
=
=
=
REF
signal source
source impedance
input channel pad
input pin capacitance
threshold voltage
leakage current at the pin due to various junctions
sampling switch
sampling switch resistor
sample/hold capacitance
Analog Input Model.
at V
and
shows a single-ended input
DD
7 pF
C
Figure 2-6
PIN
= 5V. A trade-off exists
CONV
V
DD
V
for INL and
V
) is 85 kHz.
T
T
= 0.6V
= 0.6V
I
±1 nA
LEAKAGE
Using the values in
ner frequency. See
between input impedance and acquisition time.
FIGURE 5-4:
circuit for bipolar operation.
V
IN
10 µF
C
1 k
1 µF
SS
Sampling
Switch
R
R
Figure
SS
V
Figure 5-2
Pseudo-differential biasing
IN+
IN-
OUT
MCP1525
= 1 k
 2011 Microchip Technology Inc.
5-4, we have a 100 Hz cor-
V
MCP3301
SS
C
= DAC capacitance
= 25 pF
V
SAMPLE
IN
for the relationship
0.1 µF
V
REF
V
DD
0.1 µF
= 5V

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