74LVCH32245AEC NXP [NXP Semiconductors], 74LVCH32245AEC Datasheet
74LVCH32245AEC
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74LVCH32245AEC Summary of contents
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V tolerant; 3-state Rev. 03 — 20 August 2007 1. General description The 74LVCH32245A is a 32-bit transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. The device ...
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... NXP Semiconductors 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name 74LVCH32245AEC +85 C 74LVCH32245A_3 Product data sheet 32-bit bus transceiver with direction pin tolerant; 3-state Description LFBGA96 plastic low profile fine-pitch ball grid array package; ...
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NXP Semiconductors 4. Functional diagram 1DIR A3 1A0 A5 1A1 A6 1A2 B5 1A3 B6 1A4 C5 1A5 C6 1A6 D5 1A7 D6 3DIR J3 3A0 J5 3A1 J6 3A2 K5 3A3 K6 3A4 L5 3A5 L6 3A6 M5 3A7 ...
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NXP Semiconductors Fig 2. Bus hold circuit 5. Pinning information 5.1 Pinning 6 1A1 1A3 5 1A0 1A2 4 1OE GND 3 1DIR GND 2 1B0 1B2 1 1B1 1B3 A B Fig 3. Pin configuration 5.2 Pin description Table ...
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NXP Semiconductors 6. Functional description [1] Table 3. Function selection Input nOE nDIR [ HIGH voltage level LOW voltage level don’t care high-impedance OFF-state 7. Limiting ...
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NXP Semiconductors 9. Static characteristics Table 6. Static characteristics At recommended operating conditions. Voltages are referenced to GND (ground = 0 V). Symbol Parameter +85 C amb V HIGH-level input voltage IH V LOW-level input ...
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NXP Semiconductors 10. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V). For test circuit see Symbol Parameter +85 C amb t propagation delay pd t enable time en ...
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NXP Semiconductors nOE input output LOW-to-OFF OFF-to-LOW output HIGH-to-OFF OFF-to-HIGH < ...
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NXP Semiconductors Test data is given in Table 8. Definitions for test circuit Load resistance Load capacitance including jig and probe capacitance Termination resistance should be equal to output impedance Z T ...
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NXP Semiconductors 12. Package outline LFBGA96: plastic low profile fine-pitch ball grid array package; 96 balls; body 13.5 x 5.5 x 1.05 mm ball A1 index area ...
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NXP Semiconductors 13. Abbreviations Table 9. Abbreviations Acronym Description DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 14. Revision history Table 10. Revision history Document ID Release date 74LVCH32245A_3 20070820 • ...
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NXP Semiconductors 15. Legal information 15.1 Data sheet status [1][2] Document status Product status Objective [short] data sheet Development Preliminary [short] data sheet Qualification Product [short] data sheet Production [1] Please consult the most recently issued document before initiating or ...
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NXP Semiconductors 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...