MAX6323AUT29 MAXIM [Maxim Integrated Products], MAX6323AUT29 Datasheet - Page 8

• Manufacturer Part Number: MAX6323AUT29
• Description: uP Supervisory Circuits with Windowed (Min/Max) Watchdog and Manual Reset
• Manufacturer: MAXIM [Maxim Integrated Products]

falls below the preset threshold or when the manual
reset input (MR) is asserted. The RESET output remains
asserted for at least 100ms after V
the reset threshold and MR is deasserted (Figure 5).
For noisy environments, bybass V
capacitor to ensure correct operation.
The MAX6323 has a push-pull output stage, and the
MAX6324 utilizes an open-drain output. Connect a pull-
up resistor on the RESET output of the MAX6324 to any
supply up to +6V. Select a resistor value large enough
to register a logic low (see Electrical Characteristics )
and small enough to register a logic high while supply-
ing all input leakage currents and leakage paths con-
nected to the RESET line. A 10kΩ pullup is sufficient in
most applications.
Many µP-based products require manual reset capabil-
ity to allow an operator or external logic circuitry to initi-
ate a reset. The manual reset input (MR) can connect
directly to a switch without an external pullup resistor or
debouncing network. MR is internally pulled up to V
and, therefore, can be left unconnected if unused. MR
is designed to reject fast, negative-going transients
(typically 100ns pulses), and it must be held low for a
minimum of 1µs to assert the reset output (Figure 5). A
0.1µF capacitor from MR to ground provides additional
noise immunity. After MR transitions from low to high,
reset will remain asserted for the duration of the reset
timeout period, at least 100ms.
µP Supervisory Circuits with Windowed
(Min/Max) Watchdog and Manual Reset
Figure 5. RESET Timing Relationship
8
_______________________________________________________________________________________
RESET
V
MR
CC
100ms (min)
Manual Reset Input
CC
CC
with a 500pF (min)
has risen above
CC
The MAX6323/MAX6324 are relatively immune to short-
duration negative-going V
which usually do not require the entire system to shut
down. Typically, 200ns large-amplitude pulses (from
ground to V
Lower amplitude pulses result in greater immunity.
Typically, a V
reset threshold and lasts less than 20µs will not trigger
a reset (see Typical Operating Characteristics ). An
optional 0.1µF bypass capacitor mounted close to V
provides additional transient immunity.
When V
put no longer sinks current; it becomes an open circuit.
Therefore, high-impedance CMOS logic inputs con-
nected to RESET can drift to undetermined voltages.
This does not present a problem in most applications,
since most µPs and other circuitry are inoperative with
V
RESET must be valid down to 0, adding a pulldown
resistor to RESET causes any stray leakage currents to
flow to ground, holding RESET low (Figure 6). R1’s
value is not critical; 100kΩ is large enough not to load
RESET and small enough to pull RESET to ground. This
scheme does not work with the open-drain output of the
MAX6324.
CC
120ns (typ)
below
1µs (min)
100ms (min)
CC
falls below
CC
+
CC
1.2V. However, in applications where
Negative-Going V
) on the supply will not cause a reset.
Applications Information
Ensuring a Valid Reset Output
transient that falls 100mV below the
+
1.2V, the MAX6323 RESET out-
CC
Down to V
transients (glitches),
CC
Transients
V
TH
CC
20µs (typ)
= 0V
CC