ADC0805 NSC [National Semiconductor], ADC0805 Datasheet - Page 22

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ADC0805

Manufacturer Part Number
ADC0805
Description
8-Bit uP Compatible A/D Converters
Manufacturer
NSC [National Semiconductor]
Datasheet

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Functional Description
2.5 Errors and Reference Voltage Adjustments
2.5.1 Zero Error
The zero of the A/D does not require adjustment. If the mini-
mum analog input voltage value, V
zero offset can be done. The converter can be made to out-
put 0000 0000 digital code for this minimum input voltage by
biasing the A/D V
cations section). This utilizes the differential mode operation
of the A/D.
The zero error of the A/D converter relates to the location of
the first riser of the transfer function and can be measured by
grounding the V
positive voltage to the V
ence between the actual DC input voltage that is necessary
to just cause an output digital code transition from 0000 0000
to 0000 0001 and the ideal
for V
2.5.2 Full-Scale
The full-scale adjustment can be made by applying a differ-
ential input voltage that is 1
log full-scale voltage range and then adjusting the magni-
tude of the V
not used) for a digital output code that is just changing from
1111 1110 to 1111 1111.
2.5.3 Adjusting for an Arbitrary Analog Input Voltage
Range
If the analog zero voltage of the A/D is shifted away from
ground (for example, to accommodate an analog input signal
that does not go to ground) this new zero reference should
be properly adjusted first. A V
desired zero reference plus
lated for the desired analog span, 1 LSB = analog span/256)
REF
/2 = 2.500 V
a) Analog Input Signal Example
REF
FIGURE 7. Adapting the A/D Analog Input Voltages to Match an Arbitrary Input Signal Range
IN
/2 input (pin 9 or the V
IN
(−) input and applying a small magnitude
(−) input at this V
DC
).
IN
1
(+) input. Zero error is the differ-
1
1
2
2
2
LSB less than the desired ana-
IN
LSB value (
LSB (where the LSB is calcu-
(+) voltage that equals this
IN(MIN)
IN(MIN)
DS005671-87
(Continued)
CC
, is not ground, a
1
value (see Appli-
supply if pin 9 is
2
LSB = 9.8 mV
*
22
Add if V
is applied to pin 6 and the zero reference voltage at pin 7
should then be adjusted to just obtain the 00
code transition.
The full-scale adjustment should then be made (with the
proper V
V
where:
and
(Both are ground referenced.)
The V
code change from FE
justment procedure.
2.6 Clocking Option
The clock for the A/D can be derived from the CPU clock or
an external RC can be added to provide self-clocking. The
CLK IN (pin 4) makes use of a Schmitt trigger as shown in
Figure 8 .
IN
REF
V
V
b) Accommodating an Analog Input from
(+) input which is given by:
MAX
MIN
/2
REF
0.5V (Digital Out = 00
= the low end (the offset zero) of the analog range.
= The high end of the analog input range
1 V
IN
/2 (or V
(−) voltage applied) by forcing a voltage to the
DC
with LM358 to draw 3 mA to ground.
(Digital Out = FF
CC
) voltage is then adjusted to provide a
HEX
to FF
HEX
HEX
HEX
) to 3.5V
)
. This completes the ad-
DS005671-88
HEX
to 01
HEX

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